Messages in this thread | | | From | Jagan Teki <> | Date | Wed, 16 Sep 2020 17:46:06 +0530 | Subject | Re: [PATCH] clk: rockchip: Fix overflow rate during fractional approximation |
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Hi,
On Tue, Sep 15, 2020 at 7:10 AM elaine.zhang <zhangqing@rock-chips.com> wrote: > > hi, > > We have two submissions which I hope will be helpful to you. > > https://patchwork.kernel.org/patch/11272465/ > https://patchwork.kernel.org/patch/11272471/
I can see this, I have reconstructed the fractional divider handling for px30 instead of all rockchiip platforms, is it okay to send px30-alone fractional div handling support?
> > > A few more notes: > 1. DCLK does not recommend the use of fractional frequency divider. > Generally, DCLK will monopolize a PLL, and the relationship between DCLK > frequency and PLL frequency is 1:1. > 2, half-div, not all SOC support, detailed need to see TRM.
Can you point me the Page number on TRM?
Jagan.
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