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    Subject[PATCH 5.8 041/255] ARM: dts: ls1021a: output PPS signal on FIPER2
    Date
    From: Yangbo Lu <yangbo.lu@nxp.com>

    [ Upstream commit 5656bb3857c4904d1dec6e1b8f876c1c0337274e ]

    The timer fixed interval period pulse generator register
    is used to generate periodic pulses. The down count
    register loads the value programmed in the fixed period
    interval (FIPER). At every tick of the timer accumulator
    overflow, the counter decrements by the value of
    TMR_CTRL[TCLK_PERIOD]. It generates a pulse when the down
    counter value reaches zero. It reloads the down counter
    in the cycle following a pulse.

    To use the TMR_FIPER register to generate desired periodic
    pulses. The value should programmed is,
    desired_period - tclk_period

    Current tmr-fiper2 value is to generate 100us periodic pulses.
    (But the value should have been 99995, not 99990. The tclk_period is 5.)
    This patch is to generate 1 second periodic pulses with value
    999999995 programmed which is more desired by user.

    Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
    Acked-by: Richard Cochran <richardcochran@gmail.com>
    Signed-off-by: Shawn Guo <shawnguo@kernel.org>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    arch/arm/boot/dts/ls1021a.dtsi | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
    index 760a68c163c83..b2ff27af090ec 100644
    --- a/arch/arm/boot/dts/ls1021a.dtsi
    +++ b/arch/arm/boot/dts/ls1021a.dtsi
    @@ -772,7 +772,7 @@
    fsl,tmr-prsc = <2>;
    fsl,tmr-add = <0xaaaaaaab>;
    fsl,tmr-fiper1 = <999999995>;
    - fsl,tmr-fiper2 = <99990>;
    + fsl,tmr-fiper2 = <999999995>;
    fsl,max-adj = <499999999>;
    fsl,extts-fifo;
    };
    --
    2.25.1


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