Messages in this thread | | | From | Andy Lutomirski <> | Date | Tue, 7 Jul 2020 09:36:15 -0700 | Subject | Re: [PATCH v2 1/4] x86/cpufeatures: Add enumeration for SERIALIZE instruction |
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On Mon, Jul 6, 2020 at 7:21 PM Cathy Zhang <cathy.zhang@intel.com> wrote: > > This instruction gives software a way to force the processor to complete > all modifications to flags, registers and memory from previous instructions > and drain all buffered writes to memory before the next instruction is > fetched and executed. > > The same effect can be obtained using the cpuid instruction. However, > cpuid causes modification on the eax, ebx, ecx, and ecx regiters; it > also causes a VM exit. > > A processor supports SERIALIZE instruction if CPUID.0x0x.0x0:EDX[14] is > present. The CPU feature flag is shown as "serialize" in /proc/cpuinfo. > > Detailed information on the instructions and CPUID feature flag SERIALIZE > can be found in the latest Intel Architecture Instruction Set Extensions > and Future Features Programming Reference and Intel 64 and IA-32 > Architectures Software Developer's Manual.
Can you also wire this up so sync_core() uses it?
Thanks, Andy
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