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SubjectRe: [PATCH] drm/mediatek: mtk_mt8173_hdmi_phy: Remove unnused const variables
Hi, Enric:

Chun-Kuang Hu <chunkuang.hu@kernel.org> 於 2020年5月19日 週二 下午11:12寫道:
>
> Hi, Enric:
>
> Enric Balletbo i Serra <enric.balletbo@collabora.com> 於 2020年5月19日 週二 下午5:40寫道:
> >
> > There are some `static const u8` variables that are not used, this
> > triggers a warning building with `make W=1`, it is safe to remove them,
> > so do it and make the compiler more happy.
> >
>
> Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>

Applied to mediatek-drm-fixes [1], thanks.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-fixes

Regards,
Chun-Kuang.

>
> > Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
> > ---
> >
> > .../gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c | 48 -------------------
> > 1 file changed, 48 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c
> > index 1c3575372230..827b93786fac 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c
> > @@ -107,54 +107,6 @@
> > #define RGS_HDMITX_5T1_EDG (0xf << 4)
> > #define RGS_HDMITX_PLUG_TST BIT(0)
> >
> > -static const u8 PREDIV[3][4] = {
> > - {0x0, 0x0, 0x0, 0x0}, /* 27Mhz */
> > - {0x1, 0x1, 0x1, 0x1}, /* 74Mhz */
> > - {0x1, 0x1, 0x1, 0x1} /* 148Mhz */
> > -};
> > -
> > -static const u8 TXDIV[3][4] = {
> > - {0x3, 0x3, 0x3, 0x2}, /* 27Mhz */
> > - {0x2, 0x1, 0x1, 0x1}, /* 74Mhz */
> > - {0x1, 0x0, 0x0, 0x0} /* 148Mhz */
> > -};
> > -
> > -static const u8 FBKSEL[3][4] = {
> > - {0x1, 0x1, 0x1, 0x1}, /* 27Mhz */
> > - {0x1, 0x0, 0x1, 0x1}, /* 74Mhz */
> > - {0x1, 0x0, 0x1, 0x1} /* 148Mhz */
> > -};
> > -
> > -static const u8 FBKDIV[3][4] = {
> > - {19, 24, 29, 19}, /* 27Mhz */
> > - {19, 24, 14, 19}, /* 74Mhz */
> > - {19, 24, 14, 19} /* 148Mhz */
> > -};
> > -
> > -static const u8 DIVEN[3][4] = {
> > - {0x2, 0x1, 0x1, 0x2}, /* 27Mhz */
> > - {0x2, 0x2, 0x2, 0x2}, /* 74Mhz */
> > - {0x2, 0x2, 0x2, 0x2} /* 148Mhz */
> > -};
> > -
> > -static const u8 HTPLLBP[3][4] = {
> > - {0xc, 0xc, 0x8, 0xc}, /* 27Mhz */
> > - {0xc, 0xf, 0xf, 0xc}, /* 74Mhz */
> > - {0xc, 0xf, 0xf, 0xc} /* 148Mhz */
> > -};
> > -
> > -static const u8 HTPLLBC[3][4] = {
> > - {0x2, 0x3, 0x3, 0x2}, /* 27Mhz */
> > - {0x2, 0x3, 0x3, 0x2}, /* 74Mhz */
> > - {0x2, 0x3, 0x3, 0x2} /* 148Mhz */
> > -};
> > -
> > -static const u8 HTPLLBR[3][4] = {
> > - {0x1, 0x1, 0x0, 0x1}, /* 27Mhz */
> > - {0x1, 0x2, 0x2, 0x1}, /* 74Mhz */
> > - {0x1, 0x2, 0x2, 0x1} /* 148Mhz */
> > -};
> > -
> > static int mtk_hdmi_pll_prepare(struct clk_hw *hw)
> > {
> > struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
> > --
> > 2.26.2
> >

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