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SubjectRe: [PATCH v2] arm: dts: imx7: add QSPI
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On Wed, 2020-07-29 at 09:11 +0200, Matthias Schiffer wrote:
> In preparation for an update of the TQ-Systems TQMa7x/MBa7x DTS, add
> the
> QSPI controller to imx7s.dtsi.
>
> Based-on-patch-by: Han Xu <han.xu@nxp.com>
> Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
> ---
>
> v2:
> - renamed node and label
> - reordered properties
> (as suggested by Marco Felsch)

Ugh, I neglected to check for compile warnings after adjusting the node
name. This now gives the following warning:

arch/arm/boot/dts/imx7s.dtsi:1165.24-1176.6: Warning (spi_bus_bridge):
/soc/bus@30800000/qspi@30bb0000: node name for SPI buses should be
'spi'

So I guess this should be called spi@ after all?


>
>
> arch/arm/boot/dts/imx7s.dtsi | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx7s.dtsi
> b/arch/arm/boot/dts/imx7s.dtsi
> index 1cfaf410aa43..22e4c38223bd 100644
> --- a/arch/arm/boot/dts/imx7s.dtsi
> +++ b/arch/arm/boot/dts/imx7s.dtsi
> @@ -1162,6 +1162,19 @@
> status = "disabled";
> };
>
> + qspi: qspi@30bb0000 {
> + compatible = "fsl,imx7d-qspi";
> + reg = <0x30bb0000 0x10000>, <0x60000000
> 0x10000000>;
> + reg-names = "QuadSPI", "QuadSPI-
> memory";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + interrupts = <GIC_SPI 107
> IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clks IMX7D_QSPI_ROOT_CLK>,
> + <&clks IMX7D_QSPI_ROOT_CLK>;
> + clock-names = "qspi_en", "qspi";
> + status = "disabled";
> + };
> +
> sdma: sdma@30bd0000 {
> compatible = "fsl,imx7d-sdma",
> "fsl,imx35-sdma";
> reg = <0x30bd0000 0x10000>;

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