Messages in this thread | | | Date | Wed, 22 Jul 2020 14:48:55 +0200 | From | Joerg Roedel <> | Subject | Re: [PATCH 2/2] iommu/dma: Avoid SAC address trick for PCIe devices |
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On Tue, Jul 14, 2020 at 12:42:36PM +0100, Robin Murphy wrote: > Oh bother - yes, this could have been masking all manner of bugs. That > system will presumably also break if you managed to exhaust the 32-bit IOVA > space such that the allocator moved up to the higher range anyway, or if you > passed the XHCI through to a VM with a sufficiently wacky GPA layout, but I > guess those are cases that simply nobody's run into yet. > > Does the firmware actually report any upper address constraint such that > Sebastian's IVRS aperture patches might help?
No, it doesn't. I am not sure what the best way is to get these issues found and fixed. I doubt they will be getting fixed when the allocation pattern isn't changed, maybe we can put your changes behind a config variable and start testing/reporting bugs/etc.
Regards,
Joerg
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