Messages in this thread | | | Subject | Re: [PATCH v0] clk: qcom: gcc: Update disp gpll0 branch for 7180/845 | From | Dmitry Baryshkov <> | Date | Tue, 21 Jul 2020 17:31:56 +0300 |
| |
On 15/07/2020 09:54, Taniya Das wrote: > The display gpll0 branch clock needs to be always left enabled, thus > move the clock ops to _aon branch ops.
Does this also apply to sm8250/sm8150?
> Signed-off-by: Taniya Das <tdas@codeaurora.org> > --- > drivers/clk/qcom/gcc-sc7180.c | 2 +- > drivers/clk/qcom/gcc-sdm845.c | 4 ++-- > 2 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/clk/qcom/gcc-sc7180.c b/drivers/clk/qcom/gcc-sc7180.c > index ca4383e..538677b 100644 > --- a/drivers/clk/qcom/gcc-sc7180.c > +++ b/drivers/clk/qcom/gcc-sc7180.c > @@ -1061,7 +1061,7 @@ static struct clk_branch gcc_disp_gpll0_clk_src = { > .hw = &gpll0.clkr.hw, > }, > .num_parents = 1, > - .ops = &clk_branch2_ops, > + .ops = &clk_branch2_aon_ops, > }, > }, > }; > diff --git a/drivers/clk/qcom/gcc-sdm845.c b/drivers/clk/qcom/gcc-sdm845.c > index f6ce888..90f7feb 100644 > --- a/drivers/clk/qcom/gcc-sdm845.c > +++ b/drivers/clk/qcom/gcc-sdm845.c > @@ -1,6 +1,6 @@ > // SPDX-License-Identifier: GPL-2.0 > /* > - * Copyright (c) 2018, The Linux Foundation. All rights reserved. > + * Copyright (c) 2018, 2020, The Linux Foundation. All rights reserved. > */ > > #include <linux/kernel.h> > @@ -1344,7 +1344,7 @@ static struct clk_branch gcc_disp_gpll0_clk_src = { > "gpll0", > }, > .num_parents = 1, > - .ops = &clk_branch2_ops, > + .ops = &clk_branch2_aon_ops, > }, > }, > }; > -- > Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member > of the Code Aurora Forum, hosted by the Linux Foundation. >
-- With best wishes Dmitry
| |