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    SubjectRe: [PATCH 1/2] riscv: Fix building error in entry.S when CONFIG_RISCV_M_MODE is enabled
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    On Mon, 13 Jul 2020 01:32:15 PDT (-0700), greentime.hu@sifive.com wrote:
    > arch/riscv/kernel/entry.S: Assembler messages:
    > arch/riscv/kernel/entry.S:106: Error: illegal operands `andi a0,s1,0x00001800'
    >
    > This building error is because of the SR_MPP value is too large to be used
    > as an immediate value for andi. To fix this issue I use li to set the
    > immediate value to t0, then it can use t0 and s1 to do and operation.
    >
    > Reported-by: kernel test robot <lkp@intel.com>
    > Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
    > ---
    > arch/riscv/kernel/entry.S | 3 ++-
    > 1 file changed, 2 insertions(+), 1 deletion(-)
    >
    > diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S
    > index 6ed579fc1073..000984695cd6 100644
    > --- a/arch/riscv/kernel/entry.S
    > +++ b/arch/riscv/kernel/entry.S
    > @@ -99,7 +99,8 @@ _save_context:
    >
    > #ifdef CONFIG_CONTEXT_TRACKING
    > /* If previous state is in user mode, call context_tracking_user_exit. */
    > - andi a0, s1, SR_SPP
    > + li t0, SR_PP
    > + and a0, s1, t0
    > bnez a0, skip_context_tracking
    > call context_tracking_user_exit

    Looks like this one already got fixed, I guess I saw the build report go by and
    fixed it? I don't remember if I actually pulled this in, but I ended up with a
    3-register andi so I guess I didn't do it that well.

    I'm not sure why my build test aren't catching the M-mode stuff, as the
    defconfigs are in the list. I'll go take a look...

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