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    SubjectRe: [PATCH] PCI/ATS: PASID and PRI are only enumerated in PF devices.
    Hi Ashok,

    Thank you for the patch! Yet something to improve:

    [auto build test ERROR on pci/next]
    [also build test ERROR on iommu/next linux/master linus/master v5.8-rc6 next-20200720]
    [If your patch is applied to the wrong git tree, kindly drop us a note.
    And when submitting patch, we suggest to use '--base' as documented in
    https://git-scm.com/docs/git-format-patch]

    url: https://github.com/0day-ci/linux/commits/Ashok-Raj/PCI-ATS-PASID-and-PRI-are-only-enumerated-in-PF-devices/20200721-004510
    base: https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next
    config: x86_64-kexec (attached as .config)
    compiler: gcc-9 (Debian 9.3.0-14) 9.3.0
    reproduce (this is a W=1 build):
    # save the attached .config to linux build tree
    make W=1 ARCH=x86_64

    If you fix the issue, kindly add following tag as appropriate
    Reported-by: kernel test robot <lkp@intel.com>

    All errors (new ones prefixed by >>):

    drivers/iommu/intel/iommu.c: In function 'dmar_insert_one_dev_info':
    >> drivers/iommu/intel/iommu.c:2557:8: error: implicit declaration of function 'pci_pri_supported'; did you mean 'pci_ats_supported'? [-Werror=implicit-function-declaration]
    2557 | pci_pri_supported(pdev))
    | ^~~~~~~~~~~~~~~~~
    | pci_ats_supported
    cc1: some warnings being treated as errors

    vim +2557 drivers/iommu/intel/iommu.c

    2504
    2505 static struct dmar_domain *dmar_insert_one_dev_info(struct intel_iommu *iommu,
    2506 int bus, int devfn,
    2507 struct device *dev,
    2508 struct dmar_domain *domain)
    2509 {
    2510 struct dmar_domain *found = NULL;
    2511 struct device_domain_info *info;
    2512 unsigned long flags;
    2513 int ret;
    2514
    2515 info = alloc_devinfo_mem();
    2516 if (!info)
    2517 return NULL;
    2518
    2519 if (!dev_is_real_dma_subdevice(dev)) {
    2520 info->bus = bus;
    2521 info->devfn = devfn;
    2522 info->segment = iommu->segment;
    2523 } else {
    2524 struct pci_dev *pdev = to_pci_dev(dev);
    2525
    2526 info->bus = pdev->bus->number;
    2527 info->devfn = pdev->devfn;
    2528 info->segment = pci_domain_nr(pdev->bus);
    2529 }
    2530
    2531 info->ats_supported = info->pasid_supported = info->pri_supported = 0;
    2532 info->ats_enabled = info->pasid_enabled = info->pri_enabled = 0;
    2533 info->ats_qdep = 0;
    2534 info->dev = dev;
    2535 info->domain = domain;
    2536 info->iommu = iommu;
    2537 info->pasid_table = NULL;
    2538 info->auxd_enabled = 0;
    2539 INIT_LIST_HEAD(&info->auxiliary_domains);
    2540
    2541 if (dev && dev_is_pci(dev)) {
    2542 struct pci_dev *pdev = to_pci_dev(info->dev);
    2543
    2544 if (ecap_dev_iotlb_support(iommu->ecap) &&
    2545 pci_ats_supported(pdev) &&
    2546 dmar_find_matched_atsr_unit(pdev))
    2547 info->ats_supported = 1;
    2548
    2549 if (sm_supported(iommu)) {
    2550 if (pasid_supported(iommu)) {
    2551 int features = pci_pasid_features(pdev);
    2552 if (features >= 0)
    2553 info->pasid_supported = features | 1;
    2554 }
    2555
    2556 if (info->ats_supported && ecap_prs(iommu->ecap) &&
    > 2557 pci_pri_supported(pdev))
    2558 info->pri_supported = 1;
    2559 }
    2560 }
    2561
    2562 spin_lock_irqsave(&device_domain_lock, flags);
    2563 if (dev)
    2564 found = find_domain(dev);
    2565
    2566 if (!found) {
    2567 struct device_domain_info *info2;
    2568 info2 = dmar_search_domain_by_dev_info(info->segment, info->bus,
    2569 info->devfn);
    2570 if (info2) {
    2571 found = info2->domain;
    2572 info2->dev = dev;
    2573 }
    2574 }
    2575
    2576 if (found) {
    2577 spin_unlock_irqrestore(&device_domain_lock, flags);
    2578 free_devinfo_mem(info);
    2579 /* Caller must free the original domain */
    2580 return found;
    2581 }
    2582
    2583 spin_lock(&iommu->lock);
    2584 ret = domain_attach_iommu(domain, iommu);
    2585 spin_unlock(&iommu->lock);
    2586
    2587 if (ret) {
    2588 spin_unlock_irqrestore(&device_domain_lock, flags);
    2589 free_devinfo_mem(info);
    2590 return NULL;
    2591 }
    2592
    2593 list_add(&info->link, &domain->devices);
    2594 list_add(&info->global, &device_domain_list);
    2595 if (dev)
    2596 dev->archdata.iommu = info;
    2597 spin_unlock_irqrestore(&device_domain_lock, flags);
    2598
    2599 /* PASID table is mandatory for a PCI device in scalable mode. */
    2600 if (dev && dev_is_pci(dev) && sm_supported(iommu)) {
    2601 ret = intel_pasid_alloc_table(dev);
    2602 if (ret) {
    2603 dev_err(dev, "PASID table allocation failed\n");
    2604 dmar_remove_one_dev_info(dev);
    2605 return NULL;
    2606 }
    2607
    2608 /* Setup the PASID entry for requests without PASID: */
    2609 spin_lock(&iommu->lock);
    2610 if (hw_pass_through && domain_type_is_si(domain))
    2611 ret = intel_pasid_setup_pass_through(iommu, domain,
    2612 dev, PASID_RID2PASID);
    2613 else if (domain_use_first_level(domain))
    2614 ret = domain_setup_first_level(iommu, domain, dev,
    2615 PASID_RID2PASID);
    2616 else
    2617 ret = intel_pasid_setup_second_level(iommu, domain,
    2618 dev, PASID_RID2PASID);
    2619 spin_unlock(&iommu->lock);
    2620 if (ret) {
    2621 dev_err(dev, "Setup RID2PASID failed\n");
    2622 dmar_remove_one_dev_info(dev);
    2623 return NULL;
    2624 }
    2625 }
    2626
    2627 if (dev && domain_context_mapping(domain, dev)) {
    2628 dev_err(dev, "Domain context map failed\n");
    2629 dmar_remove_one_dev_info(dev);
    2630 return NULL;
    2631 }
    2632
    2633 return domain;
    2634 }
    2635

    ---
    0-DAY CI Kernel Test Service, Intel Corporation
    https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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