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    Subject[PATCH v10 00/13] iommu/arm-smmu: Add Adreno SMMU specific implementation
    Date
    (reworded the summary to reflect ongoing changes in the code)

    This series adds an Adreno SMMU implementation to arm-smmu to allow GPU hardware
    pagetable switching.

    The Adreno GPU has built in capabilities to switch the TTBR0 pagetable during
    runtime to allow each individual instance or application to have its own
    pagetable. In order to take advantage of the HW capabilities there are certain
    requirements needed of the SMMU hardware.

    This series adds support for an Adreno specific arm-smmu implementation. The new
    implementation 1) ensures that the GPU domain is always assigned context bank 0,
    2) enables split pagetable support (TTBR1) so that the instance specific
    pagetable can be swapped while the global memory remains in place and 3) shares
    the current pagetable configuration with the GPU driver to allow it to create
    its own io-pgtable instances.

    The series then adds the drm/msm code to enable these features. For targets that
    support it allocate new pagetables using the io-pgtable configuration shared by
    the arm-smmu driver and swap them in during runtime.

    This version of the series merges the previous patchset(s) [1] and [2]
    with the following improvements:

    - arm-smmu: add implementation hook to allocate context banks
    - arm-smmu: Match the GPU domain by stream ID instead of compatible string
    - arm-smmu: Make DOMAIN_ATTR_PGTABLE_CFG bi-directional. The leaf driver
    queries the configuration to create a pagetable and then sends the newly
    created configuration back to the smmu-driver to enable TTBR0
    - drm/msm: Add context reference counting for submissions
    - drm/msm: Use dummy functions to skip TLB operations on per-instance
    pagetables

    [1] https://lists.linuxfoundation.org/pipermail/iommu/2020-June/045653.html
    [2] https://lists.linuxfoundation.org/pipermail/iommu/2020-June/045659.html


    Jordan Crouse (13):
    iommu/arm-smmu: Pass io-pgtable config to implementation specific
    function
    iommu/arm-smmu: Add support for split pagetables
    iommu/arm-smmu: Add implementation hooks to configure contexts
    iommu/arm-smmu-qcom: Add implementation for the adreno GPU SMMU
    iommu: Add a domain attribute to get/set a pagetable configuration
    iommu/arm-smmu-qcom: Get and set the pagetable config for split
    pagetables
    dt-bindings: arm-smmu: Add compatible string for Adreno GPU SMMU
    drm/msm: Add a context pointer to the submitqueue
    drm/msm: Set the global virtual address range from the IOMMU domain
    drm/msm: Add support to create a local pagetable
    drm/msm: Add support for private address space instances
    drm/msm/a6xx: Add support for per-instance pagetables
    arm: dts: qcom: sm845: Set the compatible string for the GPU SMMU

    .../devicetree/bindings/iommu/arm,smmu.yaml | 4 +
    arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
    drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 12 +-
    drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 58 ++++-
    drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 1 +
    drivers/gpu/drm/msm/adreno/adreno_gpu.c | 18 +-
    drivers/gpu/drm/msm/adreno/adreno_gpu.h | 3 +-
    drivers/gpu/drm/msm/msm_drv.c | 16 +-
    drivers/gpu/drm/msm/msm_drv.h | 13 ++
    drivers/gpu/drm/msm/msm_gem.h | 1 +
    drivers/gpu/drm/msm/msm_gem_submit.c | 8 +-
    drivers/gpu/drm/msm/msm_gem_vma.c | 9 +
    drivers/gpu/drm/msm/msm_gpu.c | 26 ++-
    drivers/gpu/drm/msm/msm_gpu.h | 12 +-
    drivers/gpu/drm/msm/msm_gpummu.c | 2 +-
    drivers/gpu/drm/msm/msm_iommu.c | 198 +++++++++++++++++-
    drivers/gpu/drm/msm/msm_mmu.h | 16 +-
    drivers/gpu/drm/msm/msm_ringbuffer.h | 1 +
    drivers/gpu/drm/msm/msm_submitqueue.c | 8 +-
    drivers/iommu/arm-smmu-impl.c | 6 +-
    drivers/iommu/arm-smmu-qcom.c | 130 +++++++++++-
    drivers/iommu/arm-smmu.c | 108 +++++-----
    drivers/iommu/arm-smmu.h | 65 +++++-
    include/linux/iommu.h | 1 +
    24 files changed, 619 insertions(+), 99 deletions(-)

    --
    2.25.1

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