lkml.org 
[lkml]   [2020]   [Jul]   [20]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH 4.9 47/86] spi: fix initial SPI_SR value in spi-fsl-dspi
    Date
    From: Angelo Dureghello <angelo@sysam.it>

    [ Upstream commit aa54c1c9d90e6db75190813907190fadcce1bf45 ]

    On ColdFire mcf54418, using DSPI_DMA_MODE mode, spi transfers
    at first boot stage are not succeding:

    m25p80 spi0.1: unrecognized JEDEC id bytes: 00, 00, 00

    The reason is the SPI_SR initial value set by the driver, that
    is not clearing (not setting to 1) the RF_DF flag. After a tour
    on the dspi hw modules that use this driver(Vybrid, ColdFire and
    ls1021a) a better init value for SR register has been set.

    Signed-off-by: Angelo Dureghello <angelo@sysam.it>
    Signed-off-by: Mark Brown <broonie@kernel.org>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/spi/spi-fsl-dspi.c | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c
    index db3b6e9151a81..672152b49d95c 100644
    --- a/drivers/spi/spi-fsl-dspi.c
    +++ b/drivers/spi/spi-fsl-dspi.c
    @@ -70,7 +70,7 @@
    #define SPI_SR 0x2c
    #define SPI_SR_EOQF 0x10000000
    #define SPI_SR_TCFQF 0x80000000
    -#define SPI_SR_CLEAR 0xdaad0000
    +#define SPI_SR_CLEAR 0x9aaf0000

    #define SPI_RSER 0x30
    #define SPI_RSER_EOQFE 0x10000000
    --
    2.25.1


    \
     
     \ /
      Last update: 2020-07-20 19:10    [W:5.871 / U:0.060 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site