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    Subject[PATCH 5.4 116/215] arm64: dts: spcfpga: Align GIC, NAND and UART nodenames with dtschema
    Date
    From: Krzysztof Kozlowski <krzk@kernel.org>

    [ Upstream commit 681a5c71fb829fc2193e3bb524af41525477f5c3 ]

    Fix dtschema validator warnings like:
    intc@fffc1000: $nodename:0:
    'intc@fffc1000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'

    Fixes: 78cd6a9d8e15 ("arm64: dts: Add base stratix 10 dtsi")
    Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
    Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 8 ++++----
    1 file changed, 4 insertions(+), 4 deletions(-)

    diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
    index d1fc9c2055f49..9498d1de730ce 100644
    --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
    +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
    @@ -77,7 +77,7 @@ psci {
    method = "smc";
    };

    - intc: intc@fffc1000 {
    + intc: interrupt-controller@fffc1000 {
    compatible = "arm,gic-400", "arm,cortex-a15-gic";
    #interrupt-cells = <3>;
    interrupt-controller;
    @@ -302,7 +302,7 @@ mmc: dwmmc0@ff808000 {
    status = "disabled";
    };

    - nand: nand@ffb90000 {
    + nand: nand-controller@ffb90000 {
    #address-cells = <1>;
    #size-cells = <0>;
    compatible = "altr,socfpga-denali-nand";
    @@ -445,7 +445,7 @@ timer3: timer3@ffd00100 {
    clock-names = "timer";
    };

    - uart0: serial0@ffc02000 {
    + uart0: serial@ffc02000 {
    compatible = "snps,dw-apb-uart";
    reg = <0xffc02000 0x100>;
    interrupts = <0 108 4>;
    @@ -456,7 +456,7 @@ uart0: serial0@ffc02000 {
    status = "disabled";
    };

    - uart1: serial1@ffc02100 {
    + uart1: serial@ffc02100 {
    compatible = "snps,dw-apb-uart";
    reg = <0xffc02100 0x100>;
    interrupts = <0 109 4>;
    --
    2.25.1


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