lkml.org 
[lkml]   [2020]   [Jul]   [19]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
Patch in this message
/
From
Subject[PATCH for v5.9] i2c: Replace HTTP links with HTTPS ones
Date
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.

Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
---
Continuing my work started at 93431e0607e5.
See also: git log --oneline '--author=Alexander A. Klimov <grandmaster@al2klimov.de>' v5.7..master
(Actually letting a shell for loop submit all this stuff for me.)

If there are any URLs to be removed completely
or at least not (just) HTTPSified:
Just clearly say so and I'll *undo my change*.
See also: https://lkml.org/lkml/2020/6/27/64

If there are any valid, but yet not changed URLs:
See: https://lkml.org/lkml/2020/6/26/837

If you apply the patch, please let me know.

Sorry again to all maintainers who complained about subject lines.
Now I realized that you want an actually perfect prefixes,
not just subsystem ones.
I tried my best...
And yes, *I could* (at least half-)automate it.
Impossible is nothing! :)


Documentation/i2c/busses/i2c-ali1535.rst | 2 +-
Documentation/i2c/busses/i2c-ali15x3.rst | 2 +-
Documentation/i2c/busses/i2c-piix4.rst | 4 ++--
drivers/i2c/busses/i2c-ali1535.c | 2 +-
drivers/i2c/busses/i2c-ali15x3.c | 2 +-
5 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/Documentation/i2c/busses/i2c-ali1535.rst b/Documentation/i2c/busses/i2c-ali1535.rst
index 6941064730dc..3fe2bad63597 100644
--- a/Documentation/i2c/busses/i2c-ali1535.rst
+++ b/Documentation/i2c/busses/i2c-ali1535.rst
@@ -28,7 +28,7 @@ Additionally, the sequencing of the SMBus transactions has been modified to
be more consistent with the sequencing recommended by the manufacturer and
observed through testing. These changes are reflected in this driver and
can be identified by comparing this driver to the i2c-ali15x3 driver. For
-an overview of these chips see http://www.acerlabs.com
+an overview of these chips see https://www.acerlabs.com

The SMB controller is part of the M7101 device, which is an ACPI-compliant
Power Management Unit (PMU).
diff --git a/Documentation/i2c/busses/i2c-ali15x3.rst b/Documentation/i2c/busses/i2c-ali15x3.rst
index d4c1a2a419cb..4e67715c0b1f 100644
--- a/Documentation/i2c/busses/i2c-ali15x3.rst
+++ b/Documentation/i2c/busses/i2c-ali15x3.rst
@@ -67,7 +67,7 @@ They are part of the following ALI chipsets:
* "Aladdin IV" includes the M1541 Socket 7 North bridge
with host bus up to 83.3 MHz.

-For an overview of these chips see http://www.acerlabs.com. At this time the
+For an overview of these chips see https://www.acerlabs.com. At this time the
full data sheets on the web site are password protected, however if you
contact the ALI office in San Jose they may give you the password.

diff --git a/drivers/i2c/busses/i2c-ali1535.c b/drivers/i2c/busses/i2c-ali1535.c
index a43deea390f5..9600d98296fa 100644
--- a/drivers/i2c/busses/i2c-ali1535.c
+++ b/drivers/i2c/busses/i2c-ali1535.c
@@ -20,7 +20,7 @@
the manufacturer and observed through testing. These
changes are reflected in this driver and can be identified
by comparing this driver to the i2c-ali15x3 driver.
- For an overview of these chips see http://www.acerlabs.com
+ For an overview of these chips see https://www.acerlabs.com

The SMB controller is part of the 7101 device, which is an
ACPI-compliant Power Management Unit (PMU).
diff --git a/drivers/i2c/busses/i2c-ali15x3.c b/drivers/i2c/busses/i2c-ali15x3.c
index 02185a1cfa77..7156499df800 100644
--- a/drivers/i2c/busses/i2c-ali15x3.c
+++ b/drivers/i2c/busses/i2c-ali15x3.c
@@ -19,7 +19,7 @@
with AGP and 100MHz CPU Front Side bus
"Aladdin IV": Includes the M1541 Socket 7 North bridge
with host bus up to 83.3 MHz.
- For an overview of these chips see http://www.acerlabs.com
+ For an overview of these chips see https://www.acerlabs.com

The M1533/M1543C devices appear as FOUR separate devices
on the PCI bus. An output of lspci will show something similar
--
2.27.0
\
 
 \ /
  Last update: 2020-07-19 21:37    [W:0.328 / U:0.016 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site