Messages in this thread Patch in this message |  | | From | Sven Van Asbroeck <> | Subject | [PATCH v1 2/5] clk: imx: add simple regmap-backed clock mux | Date | Sun, 12 Jul 2020 20:25:09 -0400 |
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On the imx6 QuadPlus, some clocktree muxes have control bits located in the GPR area. This area is already modelled as a syscon regmap.
To control these muxes, add a simple regmap-backed clock mux.
Signed-off-by: Sven Van Asbroeck <TheSven73@gmail.com> ---
Tree: v5.8-rc4
To: Shawn Guo <shawnguo@kernel.org> To: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-clk@vger.kernel.org
drivers/clk/imx/Makefile | 1 + drivers/clk/imx/clk-mux-regmap.c | 110 +++++++++++++++++++++++++++++++ drivers/clk/imx/clk.h | 7 ++ 3 files changed, 118 insertions(+) create mode 100644 drivers/clk/imx/clk-mux-regmap.c
diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile index 928f874c73d2..3d36740c1efd 100644 --- a/drivers/clk/imx/Makefile +++ b/drivers/clk/imx/Makefile @@ -19,6 +19,7 @@ obj-$(CONFIG_MXC_CLK) += \ clk-pllv3.o \ clk-pllv4.o \ clk-sscg-pll.o \ + clk-mux-regmap.o \ clk-pll14xx.o obj-$(CONFIG_MXC_CLK_SCU) += \ diff --git a/drivers/clk/imx/clk-mux-regmap.c b/drivers/clk/imx/clk-mux-regmap.c new file mode 100644 index 000000000000..ba5fde525999 --- /dev/null +++ b/drivers/clk/imx/clk-mux-regmap.c @@ -0,0 +1,110 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2020 Sven Van Asbroeck + * + * Simple clock multiplexer, backed by a regmap + */ + +#include <linux/clk-provider.h> +#include <linux/regmap.h> +#include <linux/slab.h> + +#include "clk.h" + +struct clk_mux_regmap { + struct clk_hw hw; + struct regmap *regmap; + unsigned int reg; + u8 shift; + u32 mask; +}; + +#define to_clk_mux_regmap(_hw) container_of(_hw, struct clk_mux_regmap, hw) + +static u8 clk_regmap_read_index(struct clk_mux_regmap *clk) +{ + unsigned int val; + + if (regmap_read(clk->regmap, clk->reg, &val)) + return 0; + + val >>= clk->shift; + val &= clk->mask; + + return (u8)val; +} + +static u8 clk_mux_regmap_get_parent(struct clk_hw *hw) +{ + struct clk_mux_regmap *clk = to_clk_mux_regmap(hw); + + return clk_regmap_read_index(clk); +} + +static int clk_mux_regmap_set_parent(struct clk_hw *hw, u8 index) +{ + struct clk_mux_regmap *clk = to_clk_mux_regmap(hw); + + return regmap_update_bits(clk->regmap, clk->reg, + clk->mask << clk->shift, + (unsigned int)index << clk->shift); +} + +static int clk_mux_regmap_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) +{ + struct clk_mux_regmap *clk = to_clk_mux_regmap(hw); + struct clk_hw *parent; + u8 index; + + index = clk_regmap_read_index(clk); + parent = clk_hw_get_parent_by_index(hw, index); + if (!parent) + return -EINVAL; + req->rate = clk_hw_get_rate(parent); + + return 0; +} + +static const struct clk_ops clk_mux_regmap_ops = { + .get_parent = clk_mux_regmap_get_parent, + .set_parent = clk_mux_regmap_set_parent, + .determine_rate = clk_mux_regmap_determine_rate, +}; + +struct clk_hw * +imx_clk_hw_mux_regmap(const char *name, struct regmap *regmap, unsigned int reg, + u8 shift, u8 width, const char * const *parent_names, + int num_parents) +{ + struct clk_mux_regmap *clk_regmap; + struct clk_init_data init = {}; + struct clk_hw *hw; + int ret; + + if (num_parents > (1 << width)) + return ERR_PTR(-EINVAL); + + clk_regmap = kzalloc(sizeof(*clk_regmap), GFP_KERNEL); + if (!clk_regmap) + return ERR_PTR(-ENOMEM); + + init.name = name; + init.parent_names = parent_names; + init.num_parents = num_parents; + init.ops = &clk_mux_regmap_ops; + clk_regmap->regmap = regmap; + clk_regmap->reg = reg; + clk_regmap->shift = shift; + clk_regmap->mask = BIT(width) - 1; + clk_regmap->hw.init = &init; + + hw = &clk_regmap->hw; + ret = clk_hw_register(NULL, hw); + if (ret) { + kfree(clk_regmap); + hw = ERR_PTR(ret); + } + + return hw; +} diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h index 16adbc34e05f..4df766abbe16 100644 --- a/drivers/clk/imx/clk.h +++ b/drivers/clk/imx/clk.h @@ -5,6 +5,8 @@ #include <linux/spinlock.h> #include <linux/clk-provider.h> +struct regmap; + #define IMX_CLK_GATE2_SINGLE_BIT 1 extern spinlock_t imx_ccm_lock; @@ -447,6 +449,11 @@ static inline struct clk_hw *imx_dev_clk_hw_mux(struct device *dev, reg, shift, width, 0, &imx_ccm_lock); } +struct clk_hw * +imx_clk_hw_mux_regmap(const char *name, struct regmap *regmap, unsigned int reg, + u8 shift, u8 width, const char * const *parent_names, + int num_parents); + static inline struct clk *imx_clk_mux2(const char *name, void __iomem *reg, u8 shift, u8 width, const char * const *parents, int num_parents) -- 2.17.1
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