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    Subject[PATCH net-next v1 2/5] net: phy: micrel: apply resume errata workaround for ksz8873 and ksz8863
    Date
    The ksz8873 and ksz8863 switches are affected by following errata:

    | "Receiver error in 100BASE-TX mode following Soft Power Down"
    |
    | Some KSZ8873 devices may exhibit receiver errors after transitioning
    | from Soft Power Down mode to Normal mode, as controlled by register 195
    | (0xC3) bits [1:0]. When exiting Soft Power Down mode, the receiver
    | blocks may not start up properly, causing the PHY to miss data and
    | exhibit erratic behavior. The problem may appear on either port 1 or
    | port 2, or both ports. The problem occurs only for 100BASE-TX, not
    | 10BASE-T.
    |
    | END USER IMPLICATIONS
    | When the failure occurs, the following symptoms are seen on the affected
    | port(s):
    | - The port is able to link
    | - LED0 blinks, even when there is no traffic
    | - The MIB counters indicate receive errors (Rx Fragments, Rx Symbol
    | Errors, Rx CRC Errors, Rx Alignment Errors)
    | - Only a small fraction of packets is correctly received and forwarded
    | through the switch. Most packets are dropped due to receive errors.
    |
    | The failing condition cannot be corrected by the following:
    | - Removing and reconnecting the cable
    | - Hardware reset
    | - Software Reset and PCS Reset bits in register 67 (0x43)
    |
    | Work around:
    | The problem can be corrected by setting and then clearing the Port Power
    | Down bits (registers 29 (0x1D) and 45 (0x2D), bit 3). This must be done
    | separately for each affected port after returning from Soft Power Down
    | Mode to Normal Mode. The following procedure will ensure no further
    | issues due to this erratum. To enter Soft Power Down Mode, set register
    | 195 (0xC3), bits [1:0] = 10.
    |
    | To exit Soft Power Down Mode, follow these steps:
    | 1. Set register 195 (0xC3), bits [1:0] = 00 // Exit soft power down mode
    | 2. Wait 1ms minimum
    | 3. Set register 29 (0x1D), bit [3] = 1 // Enter PHY port 1 power down mode
    | 4. Set register 29 (0x1D), bit [3] = 0 // Exit PHY port 1 power down mode
    | 5. Set register 45 (0x2D), bit [3] = 1 // Enter PHY port 2 power down mode
    | 6. Set register 45 (0x2D), bit [3] = 0 // Exit PHY port 2 power down mode

    This patch implements steps 2...6 of the suggested workaround. The first
    step needs to be implemented in the switch driver.

    Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
    ---
    drivers/net/phy/micrel.c | 22 +++++++++++++++++++++-
    1 file changed, 21 insertions(+), 1 deletion(-)

    diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
    index caf56b9b51db..12106fbea565 100644
    --- a/drivers/net/phy/micrel.c
    +++ b/drivers/net/phy/micrel.c
    @@ -1010,6 +1010,26 @@ static int ksz8873mll_config_aneg(struct phy_device *phydev)
    return 0;
    }

    +static int ksz886x_resume(struct phy_device *phydev)
    +{
    + int ret;
    +
    + /* Apply errata workaround for KSZ8863 and KSZ8873:
    + * Receiver error in 100BASE-TX mode following Soft Power Down
    + *
    + * When exiting Soft Power Down mode, the receiver blocks may not start
    + * up properly, causing the PHY to miss data and exhibit erratic
    + * behavior.
    + */
    + usleep_range(1000, 2000);
    +
    + ret = phy_set_bits(phydev, MII_BMCR, BMCR_PDOWN);
    + if (ret)
    + return ret;
    +
    + return phy_clear_bits(phydev, MII_BMCR, BMCR_PDOWN);
    +}
    +
    static int kszphy_get_sset_count(struct phy_device *phydev)
    {
    return ARRAY_SIZE(kszphy_hw_stats);
    @@ -1347,7 +1367,7 @@ static struct phy_driver ksphy_driver[] = {
    /* PHY_BASIC_FEATURES */
    .config_init = kszphy_config_init,
    .suspend = genphy_suspend,
    - .resume = genphy_resume,
    + .resume = ksz886x_resume,
    }, {
    .name = "Micrel KSZ87XX Switch",
    /* PHY_BASIC_FEATURES */
    --
    2.27.0
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