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    Subject[PATCH v4 26/37] ARM: tegra: Add interconnect properties to Tegra30 device-tree
    Date
    Add interconnect properties to the memory controller, external memory
    controller and the display controller nodes in order to describe hardware
    interconnection.

    Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
    ---
    arch/arm/boot/dts/tegra30.dtsi | 23 ++++++++++++++++++++++-
    1 file changed, 22 insertions(+), 1 deletion(-)

    diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
    index d2d05f1da274..2b183025629f 100644
    --- a/arch/arm/boot/dts/tegra30.dtsi
    +++ b/arch/arm/boot/dts/tegra30.dtsi
    @@ -208,6 +208,15 @@ dc@54200000 {

    nvidia,head = <0>;

    + interconnects = <&mc TEGRA30_MC_DISPLAY0A &emc>,
    + <&mc TEGRA30_MC_DISPLAY0B &emc>,
    + <&mc TEGRA30_MC_DISPLAY0C &emc>,
    + <&mc TEGRA30_MC_DISPLAY1B &emc>;
    + interconnect-names = "display0a",
    + "display0b",
    + "display0c",
    + "display1b";
    +
    rgb {
    status = "disabled";
    };
    @@ -227,6 +236,15 @@ dc@54240000 {

    nvidia,head = <1>;

    + interconnects = <&mc TEGRA30_MC_DISPLAY0AB &emc>,
    + <&mc TEGRA30_MC_DISPLAY0BB &emc>,
    + <&mc TEGRA30_MC_DISPLAY0CB &emc>,
    + <&mc TEGRA30_MC_DISPLAY1BB &emc>;
    + interconnect-names = "display0a",
    + "display0b",
    + "display0c",
    + "display1b";
    +
    rgb {
    status = "disabled";
    };
    @@ -733,15 +751,18 @@ mc: memory-controller@7000f000 {

    #iommu-cells = <1>;
    #reset-cells = <1>;
    + #interconnect-cells = <1>;
    };

    - memory-controller@7000f400 {
    + emc: memory-controller@7000f400 {
    compatible = "nvidia,tegra30-emc";
    reg = <0x7000f400 0x400>;
    interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
    clocks = <&tegra_car TEGRA30_CLK_EMC>;

    nvidia,memory-controller = <&mc>;
    +
    + #interconnect-cells = <0>;
    };

    fuse@7000f800 {
    --
    2.26.0
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