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    Subject[PATCH AUTOSEL 5.6 129/606] drm/amd/display: fix counter in wait_for_no_pipes_pending
    Date
    From: Roman Li <roman.li@amd.com>

    [ Upstream commit 80797dd6f1a525d1160c463d6a9f9d29af182cbb ]

    [Why]
    Wait counter is not being reset for each pipe.

    [How]
    Move counter reset into pipe loop scope.

    Signed-off-by: Roman Li <roman.li@amd.com>
    Reviewed-by: Zhan Liu <Zhan.Liu@amd.com>
    Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/gpu/drm/amd/display/dc/core/dc.c | 5 ++---
    1 file changed, 2 insertions(+), 3 deletions(-)

    diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
    index 188e51600070..b3987124183a 100644
    --- a/drivers/gpu/drm/amd/display/dc/core/dc.c
    +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
    @@ -803,11 +803,10 @@ static void disable_dangling_plane(struct dc *dc, struct dc_state *context)
    static void wait_for_no_pipes_pending(struct dc *dc, struct dc_state *context)
    {
    int i;
    - int count = 0;
    - struct pipe_ctx *pipe;
    PERF_TRACE();
    for (i = 0; i < MAX_PIPES; i++) {
    - pipe = &context->res_ctx.pipe_ctx[i];
    + int count = 0;
    + struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

    if (!pipe->plane_state)
    continue;
    --
    2.25.1
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