Messages in this thread | | | Subject | Re: [PATCH v3 10/13] PCI: brcmstb: Set internal memory viewport sizes | From | Florian Fainelli <> | Date | Wed, 3 Jun 2020 13:33:00 -0700 |
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On 6/3/2020 12:20 PM, Jim Quinlan wrote: > BrcmSTB PCIe controllers are intimately connected to the memory > controller(s) on the SOC. There is a "viewport" for each memory controller > that allows inbound accesses to CPU memory. Each viewport's size must be > set to a power of two, and that size must be equal to or larger than the > amount of memory each controller supports. > > Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com> -- Florian
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