Messages in this thread Patch in this message | | | From | Florian Fainelli <> | Subject | [PATCH 2/3] ARM: dts: bcm2711: Update SPI nodes compatible strings | Date | Wed, 3 Jun 2020 20:46:54 -0700 |
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The BCM2711 SoC features 5 SPI controllers which all share the same interrupt line, the SPI driver needs to support interrupt sharing, therefore use the chip specific compatible string to help with that.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> --- arch/arm/boot/dts/bcm2711.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi index a91cf68e3c4c..9a9ea67fbc2d 100644 --- a/arch/arm/boot/dts/bcm2711.dtsi +++ b/arch/arm/boot/dts/bcm2711.dtsi @@ -152,7 +152,7 @@ }; spi3: spi@7e204600 { - compatible = "brcm,bcm2835-spi"; + compatible = "brcm,bcm2711-spi", "brcm,bcm2835-spi"; reg = <0x7e204600 0x0200>; interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clocks BCM2835_CLOCK_VPU>; @@ -162,7 +162,7 @@ }; spi4: spi@7e204800 { - compatible = "brcm,bcm2835-spi"; + compatible = "brcm,bcm2711-spi", "brcm,bcm2835-spi"; reg = <0x7e204800 0x0200>; interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clocks BCM2835_CLOCK_VPU>; @@ -172,7 +172,7 @@ }; spi5: spi@7e204a00 { - compatible = "brcm,bcm2835-spi"; + compatible = "brcm,bcm2711-spi", "brcm,bcm2835-spi"; reg = <0x7e204a00 0x0200>; interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clocks BCM2835_CLOCK_VPU>; @@ -182,7 +182,7 @@ }; spi6: spi@7e204c00 { - compatible = "brcm,bcm2835-spi"; + compatible = "brcm,bcm2711-spi", "brcm,bcm2835-spi"; reg = <0x7e204c00 0x0200>; interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clocks BCM2835_CLOCK_VPU>; -- 2.17.1
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