Messages in this thread | | | Date | Wed, 24 Jun 2020 07:47:08 +0200 | From | Christoph Hellwig <> | Subject | Re: [PATCH 2/3] nvme-pci: Add controller memory buffer supported macro |
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On Tue, Jun 23, 2020 at 07:58:17PM -0700, Keith Busch wrote: > On Tue, Jun 23, 2020 at 06:27:51PM +0200, Christoph Hellwig wrote: > > On Tue, Jun 23, 2020 at 09:24:33PM +0800, Baolin Wang wrote: > > > Introduce a new capability macro to indicate if the controller > > > supports the memory buffer or not, instead of reading the > > > NVME_REG_CMBSZ register. > > > > This is a complex issue. The CMBS bit was only added in NVMe 1.4 as > > a backwards incompatible change, as the CMB addressing scheme can lead > > to data corruption. The CMBS was added as part of the horribe hack > > that also involves the CBA field, which we'll need to see before > > using it to work around the addressing issue. At the same time we > > should also continue supporting the legacy pre-1.4 CMB with a warning > > (and may reject it if we know we run in a VM). > > Well, a CMB from an emulated controller (like qemu's) can be used within > a VM. It's only if you direct assign a PCI function that CMB usage > breaks.
But we have no idea if a controller is assigned or emulated.
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