Messages in this thread Patch in this message | | | From | Baolin Wang <> | Subject | [PATCH 2/3] nvme-pci: Add controller memory buffer supported macro | Date | Tue, 23 Jun 2020 21:24:33 +0800 |
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Introduce a new capability macro to indicate if the controller supports the memory buffer or not, instead of reading the NVME_REG_CMBSZ register.
Signed-off-by: Baolin Wang <baolin.wang@linux.alibaba.com> --- drivers/nvme/host/pci.c | 2 +- include/linux/nvme.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c index 4b4b7b7..00c2701 100644 --- a/drivers/nvme/host/pci.c +++ b/drivers/nvme/host/pci.c @@ -1760,7 +1760,7 @@ static void nvme_map_cmb(struct nvme_dev *dev) struct pci_dev *pdev = to_pci_dev(dev->dev); int bar; - if (dev->cmb_size) + if (!NVME_CAP_CMBS(dev->ctrl.cap) || dev->cmb_size) return; dev->cmbsz = readl(dev->bar + NVME_REG_CMBSZ); diff --git a/include/linux/nvme.h b/include/linux/nvme.h index 5ce51ab..e3726be 100644 --- a/include/linux/nvme.h +++ b/include/linux/nvme.h @@ -134,6 +134,7 @@ enum { #define NVME_CAP_NSSRC(cap) (((cap) >> 36) & 0x1) #define NVME_CAP_MPSMIN(cap) (((cap) >> 48) & 0xf) #define NVME_CAP_MPSMAX(cap) (((cap) >> 52) & 0xf) +#define NVME_CAP_CMBS(cap) (((cap) >> 57) & 0x1) #define NVME_CMB_BIR(cmbloc) ((cmbloc) & 0x7) #define NVME_CMB_OFST(cmbloc) (((cmbloc) >> 12) & 0xfffff) -- 1.8.3.1
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