Messages in this thread | | | Date | Mon, 22 Jun 2020 21:05:25 -0300 | From | Jason Gunthorpe <> | Subject | Re: [Linaro-mm-sig] [PATCH 04/18] dma-fence: prime lockdep annotations |
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On Fri, Jun 19, 2020 at 04:10:11PM -0400, Jerome Glisse wrote:
> Maybe we can audit how user ptr buffer are use today and see if > we can define a usage pattern that would allow to cut corner in > kernel. For instance we could use mmu notifier just to block CPU > pte update while we do GUP and thus never wait on dma fence.
The DMA fence is the main problem, if you can think of a way to avoid it then it would be great!
> Then GPU driver just keep the GUP pin around until they are done > with the page. They can also use the mmu notifier to keep a flag > so that the driver know if it needs to redo a GUP ie: > > The notifier path: > GPU_mmu_notifier_start_callback(range) > gpu_lock_cpu_pagetable(range) > for_each_bo_in(bo, range) { > bo->need_gup = true; > } > gpu_unlock_cpu_pagetable(range)
So some kind of invalidation tracking? But this doesn't solve COW and Fork problem?
> > It is kind of unrelated to HMM, it just shouldn't be using mmu > > notifiers to replace page pinning.. > > Well my POV is that if you abide by rules HMM defined then you do > not need to pin pages. The rule is asynchronous device page table > update.
I think one of the hmm rules is to not block notifiers for a long time, which these scheme seem to violate already.
Pinning for a long time is less bad than blocing notifiers for a long time, IMHO
Jason
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