Messages in this thread | | | Subject | Re: [PATCH net-next v5 4/4] net: dp83869: Add RGMII internal delay configuration | From | Dan Murphy <> | Date | Tue, 2 Jun 2020 18:10:22 -0500 |
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Florian
On 6/2/20 5:33 PM, Florian Fainelli wrote: > > On 6/2/2020 9:45 AM, Dan Murphy wrote: >> Add RGMII internal delay configuration for Rx and Tx. >> >> Signed-off-by: Dan Murphy <dmurphy@ti.com> >> --- > [snip] > >> + >> enum { >> DP83869_PORT_MIRRORING_KEEP, >> DP83869_PORT_MIRRORING_EN, >> @@ -108,6 +113,8 @@ enum { >> struct dp83869_private { >> int tx_fifo_depth; >> int rx_fifo_depth; >> + s32 rx_id_delay; >> + s32 tx_id_delay; >> int io_impedance; >> int port_mirroring; >> bool rxctrl_strap_quirk; >> @@ -232,6 +239,22 @@ static int dp83869_of_init(struct phy_device *phydev) >> &dp83869->tx_fifo_depth)) >> dp83869->tx_fifo_depth = DP83869_PHYCR_FIFO_DEPTH_4_B_NIB; >> >> + ret = of_property_read_u32(of_node, "rx-internal-delay-ps", >> + &dp83869->rx_id_delay); >> + if (ret) { >> + dp83869->rx_id_delay = >> + dp83869_internal_delay[DP83869_CLK_DELAY_DEF]; >> + ret = 0; >> + } >> + >> + ret = of_property_read_u32(of_node, "tx-internal-delay-ps", >> + &dp83869->tx_id_delay); >> + if (ret) { >> + dp83869->tx_id_delay = >> + dp83869_internal_delay[DP83869_CLK_DELAY_DEF]; >> + ret = 0; >> + } > It is still not clear to me why is not the parsing being done by the PHY > library helper directly?
Why would we do that for these properties and not any other?
Unless there is a new precedence being set here by having the PHY framework do all the dt node parsing for common properties.
Dan
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