lkml.org 
[lkml]   [2020]   [Jun]   [11]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    /
    SubjectRe: [PATCH 0/2] PUD/PGDIR entries for linear mapping
    From
    Date
    Hi Atish,

    Le 6/10/20 à 2:32 PM, Atish Patra a écrit :
    > On Wed, Jun 3, 2020 at 8:36 AM Alexandre Ghiti <alex@ghiti.fr> wrote:
    >> This small patchset intends to use PUD/PGDIR entries for linear mapping
    >> in order to better utilize TLB.
    >>
    >> At the moment, only PMD entries can be used since on common platforms
    >> (qemu/unleashed), the kernel is loaded at DRAM + 2MB which dealigns virtual
    >> and physical addresses and then prevents the use of PUD/PGDIR entries.
    >> So the kernel must be able to get those 2MB for PAGE_OFFSET to map the
    >> beginning of the DRAM: this is achieved in patch 1.
    >>
    > I don't have in depth knowledge of how mm code works so this question
    > may be a completely
    > stupid one :). Just for my understanding,
    > As per my understanding, kernel will map those 2MB of memory but never use it.
    > How does the kernel ensure that it doesn't allocate any memory from those 2MB
    > memory if it is not marked as reserved?

    Yes, a 1GB hugepage will cover those 2MB: I rely on the previous boot
    stage to mark this region
    as reserved if there is something there (like opensbi). Otherwise, the
    kernel will indeed try to
    allocate memory from there :)

    Alex


    >> But furthermore, at the moment, the firmware (opensbi) explicitly asks the
    >> kernel not to map the region it occupies, which is on those common
    >> platforms at the very beginning of the DRAM and then it also dealigns
    >> virtual and physical addresses. I proposed a patch here:
    >>
    >> https://github.com/riscv/opensbi/pull/167
    >>
    >> that removes this 'constraint' but *not* all the time as it offers some
    >> kind of protection in case PMP is not available. So sometimes, we may
    >> have a part of the memory below the kernel that is removed creating a
    >> misalignment between virtual and physical addresses. So for performance
    >> reasons, we must at least make sure that PMD entries can be used: that
    >> is guaranteed by patch 1 too.
    >>
    >> Finally the second patch simply improves best_map_size so that whenever
    >> possible, PUD/PGDIR entries are used.
    >>
    >> Below is the kernel page table without this patch on a 6G platform:
    >>
    >> ---[ Linear mapping ]---
    >> 0xffffc00000000000-0xffffc00176e00000 0x0000000080200000 5998M PMD D A . . . W R V
    >>
    >> And with this patchset + opensbi patch:
    >>
    >> ---[ Linear mapping ]---
    >> 0xffffc00000000000-0xffffc00140000000 0x0000000080000000 5G PUD D A . . . W R V
    >> 0xffffc00140000000-0xffffc00177000000 0x00000001c0000000 880M PMD D A . . . W R V
    >>
    >> Alexandre Ghiti (2):
    >> riscv: Get memory below load_pa while ensuring linear mapping is PMD
    >> aligned
    >> riscv: Use PUD/PGDIR entries for linear mapping when possible
    >>
    >> arch/riscv/include/asm/page.h | 8 ++++
    >> arch/riscv/mm/init.c | 69 +++++++++++++++++++++++++++++------
    >> 2 files changed, 65 insertions(+), 12 deletions(-)
    >>
    >> --
    >> 2.20.1
    >>
    >>
    >

    \
     
     \ /
      Last update: 2020-06-11 08:52    [W:3.745 / U:0.188 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site