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    SubjectRe: [PATCH] iommu/amd: Fix event counter availability check
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    Hi Alexander,

    On 5/30/20 3:07 AM, Alexander Monakov wrote:
    > The driver performs an extra check if the IOMMU's capabilities advertise
    > presence of performance counters: it verifies that counters are writable
    > by writing a hard-coded value to a counter and testing that reading that
    > counter gives back the same value.
    >
    > Unfortunately it does so quite early, even before pci_enable_device is
    > called for the IOMMU, i.e. when accessing its MMIO space is not
    > guaranteed to work. On Ryzen 4500U CPU, this actually breaks the test:
    > the driver assumes the counters are not writable, and disables the
    > functionality.
    >
    > Moving init_iommu_perf_ctr just after iommu_flush_all_caches resolves
    > the issue. This is the earliest point in amd_iommu_init_pci where the
    > call succeeds on my laptop.

    According to your description, it should just need to be anywhere after the pci_enable_device() is called for the IOMMU
    device, isn't it? So, on your system, what if we just move the init_iommu_perf_ctr() here:

    diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c
    index 5b81fd16f5fa..17b9ac9491e0 100644
    --- a/drivers/iommu/amd_iommu_init.c
    +++ b/drivers/iommu/amd_iommu_init.c
    @@ -1875,6 +1875,7 @@ static int __init amd_iommu_init_pci(void)
    ret = iommu_init_pci(iommu);
    if (ret)
    break;
    + init_iommu_perf_ctr(iommu);
    }

    /*
    --
    2.17.1

    Does this works?

    Thanks,
    Suravee

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