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    Subject[PATCH v3 7/7] arm64: dts: k3-j721e-proc-board: Add wait time for sampling Type-C DIR line
    Date
    The Type-C compainon chip on the board needs ~133ms (tCCB_DEFAULT)
    to debounce the CC lines in order to detect attach and plug orientation
    and reflect the correct DIR status. [1]

    On the EVM however we need to wait upto 700ms before sampling the
    Type-C DIR line else we can get incorrect direction state.

    [1] http://www.ti.com/lit/ds/symlink/tusb321.pdf

    Signed-off-by: Roger Quadros <rogerq@ti.com>
    Signed-off-by: Sekhar Nori <nsekhar@ti.com>
    ---
    arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts | 1 +
    1 file changed, 1 insertion(+)

    diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
    index 55c98688eceb..8c505904d7cb 100644
    --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
    +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
    @@ -350,6 +350,7 @@

    &serdes_wiz3 {
    typec-dir-gpios = <&main_gpio1 3 GPIO_ACTIVE_HIGH>;
    + typec-dir-debounce-ms = <700>; /* TUSB321, tCCB_DEFAULT 133 ms */
    };

    &serdes3 {
    --
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