| Date | Fri, 8 May 2020 18:30:23 +0100 | From | Mark Brown <> | Subject | Re: [PATCH 07/17] spi: dw: Add Tx/Rx finish wait methods to DMA |
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On Fri, May 08, 2020 at 04:29:32PM +0300, Serge Semin wrote:
> Since DMA transfers are performed asynchronously with actual SPI > transaction, then even if DMA transfers are finished it doesn't mean > all data is actually pushed to the SPI bus. Some data might still be
This looks like a bug fix so it should really have gone at the start of the series so it can be sent to Linus as a bug fix rather than waiting for the merge window. This makes sense to me, a couple of nits below:
> +static void dw_spi_dma_wait_tx_done(struct dw_spi *dws) > +{ > + int retry = WAIT_RETRIES; > + unsigned long ns; > + > + ns = (NSEC_PER_SEC / spi_get_clk(dws)) * dws->n_bytes * BITS_PER_BYTE; > + ns *= dw_readl(dws, DW_SPI_TXFLR); > + > + while (dw_spi_dma_tx_busy(dws) && retry--) > + ndelay(ns);
How deep can the FIFO be with this IP - could we end up ndelay()ing for non-trivial amounts of time?
> +static inline u32 spi_get_clk(struct dw_spi *dws) > +{ > + u32 div = dw_readl(dws, DW_SPI_BAUDR); > + > + return div ? dws->max_freq / div : 0;
Please write normal conditional statements rather than using the ternery operator - it helps with legibility. [unhandled content-type:application/pgp-signature] |