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SubjectRe: [PATCH] x86: bitops: fix build regression
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On May 7, 2020 4:34:22 AM PDT, Peter Zijlstra <peterz@infradead.org> wrote:
>On Tue, May 05, 2020 at 11:07:24AM -0700, hpa@zytor.com wrote:
>> On May 5, 2020 10:44:22 AM PDT, Nick Desaulniers
><ndesaulniers@google.com> wrote:
>
>> >@@ -54,7 +54,7 @@ arch_set_bit(long nr, volatile unsigned long
>*addr)
>> > if (__builtin_constant_p(nr)) {
>> > asm volatile(LOCK_PREFIX "orb %1,%0"
>> > : CONST_MASK_ADDR(nr, addr)
>> >- : "iq" (CONST_MASK(nr) & 0xff)
>> >+ : "iq" ((u8)(CONST_MASK(nr) & 0xff))
>> > : "memory");
>> > } else {
>> > asm volatile(LOCK_PREFIX __ASM_SIZE(bts) " %1,%0"
>> >@@ -74,7 +74,7 @@ arch_clear_bit(long nr, volatile unsigned long
>*addr)
>> > if (__builtin_constant_p(nr)) {
>> > asm volatile(LOCK_PREFIX "andb %1,%0"
>> > : CONST_MASK_ADDR(nr, addr)
>> >- : "iq" (CONST_MASK(nr) ^ 0xff));
>> >+ : "iq" ((u8)(CONST_MASK(nr) ^ 0xff)));
>> > } else {
>> > asm volatile(LOCK_PREFIX __ASM_SIZE(btr) " %1,%0"
>> > : : RLONG_ADDR(addr), "Ir" (nr) : "memory");
>>
>> Drop & 0xff and change ^ 0xff to ~.
>
>But then we're back to sparse being unhappy, no? The thing with ~ is
>that it will set high bits which will be truncated, which makes sparse
>sad.

In that case, sparse is just broken.
--
Sent from my Android device with K-9 Mail. Please excuse my brevity.

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