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    Subject[PATCH v2 25/45] powerpc/8xx: Prepare handlers for _PAGE_HUGE for 512k pages.
    Date
    Prepare ITLB handler to handle _PAGE_HUGE when CONFIG_HUGETLBFS
    is enabled. This means that the L1 entry has to be kept in r11
    until L2 entry is read, in order to insert _PAGE_HUGE into it.

    Also move pgd_offset helpers before pte_update() as they
    will be needed there in next patch.

    Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
    ---
    arch/powerpc/include/asm/nohash/32/pgtable.h | 13 ++++++-------
    arch/powerpc/kernel/head_8xx.S | 15 +++++++++------
    2 files changed, 15 insertions(+), 13 deletions(-)

    diff --git a/arch/powerpc/include/asm/nohash/32/pgtable.h b/arch/powerpc/include/asm/nohash/32/pgtable.h
    index dd5835354e33..1a86d20b58f3 100644
    --- a/arch/powerpc/include/asm/nohash/32/pgtable.h
    +++ b/arch/powerpc/include/asm/nohash/32/pgtable.h
    @@ -206,6 +206,12 @@ static inline void pmd_clear(pmd_t *pmdp)
    }


    +/* to find an entry in a kernel page-table-directory */
    +#define pgd_offset_k(address) pgd_offset(&init_mm, address)
    +
    +/* to find an entry in a page-table-directory */
    +#define pgd_index(address) ((address) >> PGDIR_SHIFT)
    +#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))

    /*
    * PTE updates. This function is called whenever an existing
    @@ -348,13 +354,6 @@ static inline int pte_young(pte_t pte)
    pfn_to_page((__pa(pmd_val(pmd)) >> PAGE_SHIFT))
    #endif

    -/* to find an entry in a kernel page-table-directory */
    -#define pgd_offset_k(address) pgd_offset(&init_mm, address)
    -
    -/* to find an entry in a page-table-directory */
    -#define pgd_index(address) ((address) >> PGDIR_SHIFT)
    -#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
    -
    /* Find an entry in the third-level page table.. */
    #define pte_index(address) \
    (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
    diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
    index 905205c79a25..adad8baadcf5 100644
    --- a/arch/powerpc/kernel/head_8xx.S
    +++ b/arch/powerpc/kernel/head_8xx.S
    @@ -196,7 +196,7 @@ SystemCall:

    InstructionTLBMiss:
    mtspr SPRN_SPRG_SCRATCH0, r10
    -#if defined(ITLB_MISS_KERNEL) || defined(CONFIG_SWAP)
    +#if defined(ITLB_MISS_KERNEL) || defined(CONFIG_SWAP) || defined(CONFIG_HUGETLBFS)
    mtspr SPRN_SPRG_SCRATCH1, r11
    #endif

    @@ -235,16 +235,19 @@ InstructionTLBMiss:
    rlwinm r10, r10, 0, 20, 31
    oris r10, r10, (swapper_pg_dir - PAGE_OFFSET)@ha
    3:
    + mtcr r11
    #endif
    +#ifdef CONFIG_HUGETLBFS
    + lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r10) /* Get level 1 entry */
    + mtspr SPRN_MI_TWC, r11 /* Set segment attributes */
    + mtspr SPRN_MD_TWC, r11
    +#else
    lwz r10, (swapper_pg_dir-PAGE_OFFSET)@l(r10) /* Get level 1 entry */
    mtspr SPRN_MI_TWC, r10 /* Set segment attributes */
    -
    mtspr SPRN_MD_TWC, r10
    +#endif
    mfspr r10, SPRN_MD_TWC
    lwz r10, 0(r10) /* Get the pte */
    -#ifdef ITLB_MISS_KERNEL
    - mtcr r11
    -#endif
    #ifdef CONFIG_SWAP
    rlwinm r11, r10, 32-5, _PAGE_PRESENT
    and r11, r11, r10
    @@ -263,7 +266,7 @@ InstructionTLBMiss:

    /* Restore registers */
    0: mfspr r10, SPRN_SPRG_SCRATCH0
    -#if defined(ITLB_MISS_KERNEL) || defined(CONFIG_SWAP)
    +#if defined(ITLB_MISS_KERNEL) || defined(CONFIG_SWAP) || defined(CONFIG_HUGETLBFS)
    mfspr r11, SPRN_SPRG_SCRATCH1
    #endif
    rfi
    --
    2.25.0
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