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    Subject[PATCH v3 6/7] clocksource: mips-gic-timer: Register as sched_clock
    Date
    From: Paul Burton <paulburton@kernel.org>

    From: Paul Burton <paulburton@kernel.org>

    The MIPS GIC timer is well suited for use as sched_clock, so register it
    as such.

    Whilst the existing gic_read_count() function matches the prototype
    needed by sched_clock_register() already, we split it into 2 functions
    in order to remove the need to evaluate the mips_cm_is64 condition
    within each call since sched_clock should be as fast as possible.

    Signed-off-by: Paul Burton <paulburton@kernel.org>
    Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
    Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
    Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
    Cc: Ralf Baechle <ralf@linux-mips.org>
    Cc: Alessandro Zummo <a.zummo@towertech.it>
    Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
    Cc: Arnd Bergmann <arnd@arndb.de>
    Cc: Rob Herring <robh+dt@kernel.org>
    Cc: linux-mips@vger.kernel.org
    Cc: linux-rtc@vger.kernel.org
    Cc: devicetree@vger.kernel.org
    ---
    drivers/clocksource/mips-gic-timer.c | 23 +++++++++++++++++++----
    1 file changed, 19 insertions(+), 4 deletions(-)

    diff --git a/drivers/clocksource/mips-gic-timer.c b/drivers/clocksource/mips-gic-timer.c
    index 8b5f8ae723cb..802b93fe3ae7 100644
    --- a/drivers/clocksource/mips-gic-timer.c
    +++ b/drivers/clocksource/mips-gic-timer.c
    @@ -16,6 +16,7 @@
    #include <linux/notifier.h>
    #include <linux/of_irq.h>
    #include <linux/percpu.h>
    +#include <linux/sched_clock.h>
    #include <linux/smp.h>
    #include <linux/time.h>
    #include <asm/mips-cps.h>
    @@ -24,13 +25,10 @@ static DEFINE_PER_CPU(struct clock_event_device, gic_clockevent_device);
    static int gic_timer_irq;
    static unsigned int gic_frequency;

    -static u64 notrace gic_read_count(void)
    +static u64 notrace gic_read_count_2x32(void)
    {
    unsigned int hi, hi2, lo;

    - if (mips_cm_is64)
    - return read_gic_counter();
    -
    do {
    hi = read_gic_counter_32h();
    lo = read_gic_counter_32l();
    @@ -40,6 +38,19 @@ static u64 notrace gic_read_count(void)
    return (((u64) hi) << 32) + lo;
    }

    +static u64 notrace gic_read_count_64(void)
    +{
    + return read_gic_counter();
    +}
    +
    +static u64 notrace gic_read_count(void)
    +{
    + if (mips_cm_is64)
    + return gic_read_count_64();
    +
    + return gic_read_count_2x32();
    +}
    +
    static int gic_next_event(unsigned long delta, struct clock_event_device *evt)
    {
    int cpu = cpumask_first(evt->cpumask);
    @@ -228,6 +239,10 @@ static int __init gic_clocksource_of_init(struct device_node *node)
    /* And finally start the counter */
    clear_gic_config(GIC_CONFIG_COUNTSTOP);

    + sched_clock_register(mips_cm_is64 ?
    + gic_read_count_64 : gic_read_count_2x32,
    + 64, gic_frequency);
    +
    return 0;
    }
    TIMER_OF_DECLARE(mips_gic_timer, "mti,gic-timer",
    --
    2.25.1
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