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SubjectRe: [PATCH v3 2/4] dt-bindings: clk: Add Baikal-T1 CCU Dividers binding
Quoting Serge Semin (2020-05-26 15:20:54)
> After being gained by the CCU PLLs the signals must be transformed to
> be suitable for the clock-consumers. This is done by a set of dividers
> embedded into the CCU. A first block of dividers is used to create
> reference clocks for AXI-bus of high-speed peripheral IP-cores of the
> chip. The second block dividers alter the PLLs output signals to be then
> consumed by SoC peripheral devices. Both block DT nodes are ordinary
> clock-providers with standard set of properties supported. But in addition
> to that each clock provider can be used to reset the corresponding clock
> domain. This makes the AXI-bus and System Devices CCU DT nodes to be also
> reset-providers.
> Signed-off-by: Serge Semin <>
> Cc: Alexey Malahov <>
> Cc: Arnd Bergmann <>
> Cc:
> ---

Applied to clk-next

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