lkml.org 
[lkml]   [2020]   [May]   [29]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
SubjectRe: [Qemu-devel PATCH] target/i386: define a new MSR based feature word - FEAT_PERF_CAPABILITIES
From
Date
On 29/05/20 09:43, Like Xu wrote:
> + if (!cpu->enable_pmu) {
> + *ecx &= ~CPUID_EXT_PDCM;
> + }
> break;
> case 2:
> /* cache info: needed for Pentium Pro compatibility */
> @@ -6505,6 +6528,12 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
> }
> }
>
> + if (kvm_enabled() && cpu->enable_pmu &&
> + (kvm_arch_get_supported_cpuid(kvm_state, 1, 0, R_ECX) &
> + CPUID_EXT_PDCM)) {
> + env->features[FEAT_1_ECX] |= CPUID_EXT_PDCM;
> + }
> +

I'm dropping this hunk two hunks because it's going to break live
migration with e.g. "-cpu IvyBridge,pmu=on". We will have to add PDCM
by default only to future CPU models, but "-cpu host,pmu=on" will pick
it up automatically.

Paolo

\
 
 \ /
  Last update: 2020-05-29 12:24    [W:0.096 / U:1.020 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site