Re: [PATCH 2/3] CLK: HSDK: CGU: support PLL bypassing
From
Stephen Boyd <>
Date
Thu, 28 May 2020 21:07:26 -0700
Quoting Eugeniy Paltsev (2020-03-11 06:41:14) > Support setting PLL to bypass mode to support output frequency > equal to input one. > > Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> > ---