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    Subject[PATCH 04/14] x86/hw_breakpoint: Prevent data breakpoints on user_pcid_flush_mask
    From: Lai Jiangshan <laijs@linux.alibaba.com>

    The percpu user_pcid_flush_mask is used for CPU entry
    If a data breakpoint on it, it will cause an unwanted #DB.
    Protect the full cpu_tlbstate structure to be sure.

    There are some other percpu data used in CPU entry, but they are
    either in already-protected cpu_tss_rw or are safe to trigger #DB
    (espfix_waddr, espfix_stack).

    Signed-off-by: Lai Jiangshan <laijs@linux.alibaba.com>
    Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
    Link: https://lkml.kernel.org/r/20200526014221.2119-5-laijs@linux.alibaba.com
    ---
    arch/x86/kernel/hw_breakpoint.c | 11 +++++++++++
    1 file changed, 11 insertions(+)

    --- a/arch/x86/kernel/hw_breakpoint.c
    +++ b/arch/x86/kernel/hw_breakpoint.c
    @@ -33,6 +33,7 @@
    #include <asm/debugreg.h>
    #include <asm/user.h>
    #include <asm/desc.h>
    +#include <asm/tlbflush.h>

    /* Per cpu debug control register value */
    DEFINE_PER_CPU(unsigned long, cpu_dr7);
    @@ -264,6 +265,16 @@ static inline bool within_cpu_entry(unsi
    (unsigned long)&per_cpu(cpu_tss_rw, cpu),
    sizeof(struct tss_struct)))
    return true;
    +
    + /*
    + * cpu_tlbstate.user_pcid_flush_mask is used for CPU entry.
    + * If a data breakpoint on it, it will cause an unwanted #DB.
    + * Protect the full cpu_tlbstate structure to be sure.
    + */
    + if (within_area(addr, end,
    + (unsigned long)&per_cpu(cpu_tlbstate, cpu),
    + sizeof(struct tlb_state)))
    + return true;
    }

    return false;

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