lkml.org 
[lkml]   [2020]   [May]   [27]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [PATCH 10/14] dt-bindings: clock: sparx5: Add Sparx5 SoC DPLL clock
On Wed, May 13, 2020 at 02:55:28PM +0200, Lars Povlsen wrote:
> This add the DT bindings documentation for the Sparx5 SoC DPLL clock
>
> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
> ---
> .../bindings/clock/microchip,sparx5-dpll.yaml | 46 +++++++++++++++++++
> 1 file changed, 46 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml
>
> diff --git a/Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml b/Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml
> new file mode 100644
> index 0000000000000..594007d8fc59a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml
> @@ -0,0 +1,46 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/microchip,sparx5-dpll.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microchip Sparx5 DPLL Clock
> +
> +maintainers:
> + - Lars Povlsen <lars.povlsen@microchip.com>
> +
> +description: |
> + The Sparx5 DPLL clock controller generates and supplies clock to
> + various peripherals within the SoC.
> +
> + This binding uses common clock bindings
> + [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
> +
> +properties:
> + compatible:
> + const: microchip,sparx5-dpll
> +
> + reg:
> + items:
> + - description: dpll registers

For a single entry, just:

maxItems: 1

> +
> + '#clock-cells':
> + const: 1
> +
> +required:
> + - compatible
> + - reg
> + - '#clock-cells'
> +
> +additionalProperties: false
> +
> +examples:
> + # Clock provider for eMMC:
> + - |
> + clks: clks@61110000c {

clock-controller@1110000c {

> + compatible = "microchip,sparx5-dpll";
> + #clock-cells = <1>;
> + reg = <0x1110000c 0x24>;

Looks like this is a sub-block in some other h/w block. What's the
parent device? That should be described and this should be part of it
either as a single node or a child node. Without a complete view of what
this block has I can't provide any guidance.

Rob

\
 
 \ /
  Last update: 2020-05-28 04:19    [W:0.194 / U:0.092 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site