Messages in this thread | | | Subject | Re: [PATCH 04/15] PCI: brcmstb: Add compatibily of other chips | From | Nicolas Saenz Julienne <> | Date | Fri, 22 May 2020 11:17:08 +0200 |
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On Thu, 2020-05-21 at 15:35 -0400, Jim Quinlan wrote: > On Wed, May 20, 2020 at 7:51 AM Nicolas Saenz Julienne
[...]
> > > /* > > > @@ -602,20 +667,21 @@ static struct pci_ops brcm_pcie_ops = { > > > > > > static inline void brcm_pcie_bridge_sw_init_set(struct brcm_pcie *pcie, > > > u32 > > > val) > > > { > > > - u32 tmp; > > > + u32 tmp, mask = pcie->reg_field_info[RGR1_SW_INIT_1_INIT_MASK]; > > > + u32 shift = pcie->reg_field_info[RGR1_SW_INIT_1_INIT_SHIFT]; > > > > I don't think you need shift here, IIUC u32p_replace_bits() will take care > > of > > all the masking and shifting internally, moreover, you'd be able to drop the > > shift entry from reg_field_info. > I believe that u32p_replace_bits requires at least one of the value or > mask to be compile time constants to work and we don't have that here.
Of course, sorry for the noise then.
Regards, Nicolas
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