Messages in this thread | | | Date | Wed, 20 May 2020 20:30:57 +0200 | From | Thomas Bogendoerfer <> | Subject | Re: [PATCH v2 18/20] mips: csrc-r4k: Decrease r4k-clocksource rating if CPU_FREQ enabled |
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On Wed, May 20, 2020 at 04:48:26PM +0300, Serge Semin wrote: > On Wed, May 20, 2020 at 03:38:27PM +0200, Thomas Bogendoerfer wrote: > > On Wed, May 20, 2020 at 03:12:01PM +0300, Serge Semin wrote: > > > Since you don't like the way I initially fixed it, suppose there we don't have > > > another way but to introduce something like CONFIG_MIPS_CPS_NS16550_WIDTH > > > parameter to select a proper accessors, like sw in our case, and sb by defaul). > > > Right? > > > > to be on the safe side it's probably the best thing. But I don't know > > enough about CPS_NS16550 to judge whether shift value correlates with > > possible access width. > > The base address passed to the _mips_cps_putc() leaf is UART-base address. It > has nothing to do with CPS. See:
ok, I'm confused. So this isn't an uart inside CPS hardware, but an uart used by CPS code for debug output, right ?
To solve the issued please add CONFIG_MIPS_CPS_NS16550_WIDTH to select the correct access width.
Thomas.
-- Crap can work. Given enough thrust pigs will fly, but it's not necessarily a good idea. [ RFC1925, 2.3 ]
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