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    Subject[PATCH v8 2/6] MIPS: CI20: Modify DTS to support high resolution timer for SMP.
    Date
    Modify DTS, change tcu channel from 2 to 3, channel #0 and #1 for
    per core local timer, #2 for clocksource.

    Tested-by: H. Nikolaus Schaller <hns@goldelico.com>
    Tested-by: Paul Boddie <paul@boddie.org.uk>
    Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
    ---

    Notes:
    v1->v2:
    No change.

    v2->v3:
    No change.

    v3->v4:
    Rebase on top of kernel 5.6-rc1.

    v4->v5:
    Move [5/6] in v4 to this patch, to ensure that we can
    git-bisect without ending up with a broken kernel.

    v5->v6:
    No change.

    v6->v7:
    Remove unnecessary "ingenic,pwm-channels-mask".

    v7->v8:
    No change.

    arch/mips/boot/dts/ingenic/ci20.dts | 11 ++++++++---
    1 file changed, 8 insertions(+), 3 deletions(-)

    diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts
    index db0ca25..06e3186 100644
    --- a/arch/mips/boot/dts/ingenic/ci20.dts
    +++ b/arch/mips/boot/dts/ingenic/ci20.dts
    @@ -486,7 +486,12 @@
    };

    &tcu {
    - /* 3 MHz for the system timer and clocksource */
    - assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>;
    - assigned-clock-rates = <3000000>, <3000000>;
    + /*
    + * 750 kHz for the system timers and clocksource,
    + * use channel #0 and #1 for the per cpu system timers,
    + * and use channel #2 for the clocksource.
    + */
    + assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
    + <&tcu TCU_CLK_TIMER2>;
    + assigned-clock-rates = <750000>, <750000>, <750000>;
    };
    --
    2.7.4
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