Messages in this thread | | | From | Thomas Gleixner <> | Subject | Re: [PATCH v12 00/18] Enable FSGSBASE instructions | Date | Mon, 18 May 2020 16:53:35 +0200 |
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Cc: +x86@kernel.org ....
Sasha Levin <sashal@kernel.org> writes:
> Benefits: > Currently a user process that wishes to read or write the FS/GS base must > make a system call. But recent X86 processors have added new instructions > for use in 64-bit mode that allow direct access to the FS and GS segment > base addresses. The operating system controls whether applications can > use these instructions with a %cr4 control bit. > > In addition to benefits to applications, performance improvements to the > OS context switch code are possible by making use of these instructions. A > third party reported out promising performance numbers out of their > initial benchmarking of the previous version of this patch series [9]. > > Enablement check: > The kernel provides information about the enabled state of FSGSBASE to > applications using the ELF_AUX vector. If the HWCAP2_FSGSBASE bit is set in > the AUX vector, the kernel has FSGSBASE instructions enabled and > applications can use them. > > Kernel changes: > Major changes made in the kernel are in context switch, paranoid path, and > ptrace. In a context switch, a task's FS/GS base will be secured regardless > of its selector. In the paranoid path, GS base is unconditionally > overwritten to the kernel GS base on entry and the original GS base is > restored on exit. Ptrace includes divergence of FS/GS index and base > values. > > Security: > For mitigating the Spectre v1 SWAPGS issue, LFENCE instructions were added > on most kernel entries. Those patches are dependent on previous behaviors > that users couldn't load a kernel address into the GS base. These patches > change that assumption since the user can load any address into GS base. > The changes to the kernel entry path in this patch series take account of > the SWAPGS issue.
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