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    Subject[PATCH v3 29/45] powerpc/8xx: Move PPC_PIN_TLB options into 8xx Kconfig
    Date
    PPC_PIN_TLB options are dedicated to the 8xx, move them into
    the 8xx Kconfig.

    While we are at it, add some text to explain what it does.

    Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
    ---
    arch/powerpc/Kconfig | 20 ---------------
    arch/powerpc/platforms/8xx/Kconfig | 41 ++++++++++++++++++++++++++++++
    2 files changed, 41 insertions(+), 20 deletions(-)

    diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
    index 8324d98728db..f552726c9de2 100644
    --- a/arch/powerpc/Kconfig
    +++ b/arch/powerpc/Kconfig
    @@ -1226,26 +1226,6 @@ config TASK_SIZE
    hex "Size of user task space" if TASK_SIZE_BOOL
    default "0x80000000" if PPC_8xx
    default "0xc0000000"
    -
    -config PIN_TLB
    - bool "Pinned Kernel TLBs (860 ONLY)"
    - depends on ADVANCED_OPTIONS && PPC_8xx && \
    - !DEBUG_PAGEALLOC && !STRICT_KERNEL_RWX
    -
    -config PIN_TLB_DATA
    - bool "Pinned TLB for DATA"
    - depends on PIN_TLB
    - default y
    -
    -config PIN_TLB_IMMR
    - bool "Pinned TLB for IMMR"
    - depends on PIN_TLB || PPC_EARLY_DEBUG_CPM
    - default y
    -
    -config PIN_TLB_TEXT
    - bool "Pinned TLB for TEXT"
    - depends on PIN_TLB
    - default y
    endmenu

    if PPC64
    diff --git a/arch/powerpc/platforms/8xx/Kconfig b/arch/powerpc/platforms/8xx/Kconfig
    index b37de62d7e7f..0d036cd868ef 100644
    --- a/arch/powerpc/platforms/8xx/Kconfig
    +++ b/arch/powerpc/platforms/8xx/Kconfig
    @@ -162,4 +162,45 @@ config UCODE_PATCH
    default y
    depends on !NO_UCODE_PATCH

    +menu "8xx advanced setup"
    + depends on PPC_8xx
    +
    +config PIN_TLB
    + bool "Pinned Kernel TLBs"
    + depends on ADVANCED_OPTIONS && !DEBUG_PAGEALLOC && !STRICT_KERNEL_RWX
    + help
    + On the 8xx, we have 32 instruction TLBs and 32 data TLBs. In each
    + table 4 TLBs can be pinned.
    +
    + It reduces the amount of usable TLBs to 28 (ie by 12%). That's the
    + reason why we make it selectable.
    +
    + This option does nothing, it just activate the selection of what
    + to pin.
    +
    +config PIN_TLB_DATA
    + bool "Pinned TLB for DATA"
    + depends on PIN_TLB
    + default y
    + help
    + This pins the first 32 Mbytes of memory with 8M pages.
    +
    +config PIN_TLB_IMMR
    + bool "Pinned TLB for IMMR"
    + depends on PIN_TLB || PPC_EARLY_DEBUG_CPM
    + default y
    + help
    + This pins the IMMR area with a 512kbytes page. In case
    + CONFIG_PIN_TLB_DATA is also selected, it will reduce
    + CONFIG_PIN_TLB_DATA to 24 Mbytes.
    +
    +config PIN_TLB_TEXT
    + bool "Pinned TLB for TEXT"
    + depends on PIN_TLB
    + default y
    + help
    + This pins kernel text with 8M pages.
    +
    +endmenu
    +
    endmenu
    --
    2.25.0
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