| Date | Fri, 1 May 2020 17:27:28 +0200 | From | Andrew Lunn <> | Subject | Re: [PATCH RFC v2 02/11] dt-bindings: net: dwmac-meson: Document the "timing-adjustment" clock |
| |
On Wed, Apr 29, 2020 at 10:16:35PM +0200, Martin Blumenstingl wrote: > The PRG_ETHERNET registers can add an RX delay in RGMII mode. This > requires an internal re-timing circuit whose input clock is called > "timing adjustment clock". Document this clock input so the clock can be > enabled as needed. > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
|