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    Subject[PATCH V2 2/8] dt-bindings: clock: Add YAML schemas for QCOM A53 PLL
    Date
    This patch adds schema for primary CPU PLL found on few Qualcomm
    platforms.

    Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
    ---
    .../devicetree/bindings/clock/qcom,a53pll.txt | 22 --------
    .../devicetree/bindings/clock/qcom,a53pll.yaml | 60 ++++++++++++++++++++++
    2 files changed, 60 insertions(+), 22 deletions(-)
    delete mode 100644 Documentation/devicetree/bindings/clock/qcom,a53pll.txt
    create mode 100644 Documentation/devicetree/bindings/clock/qcom,a53pll.yaml

    diff --git a/Documentation/devicetree/bindings/clock/qcom,a53pll.txt b/Documentation/devicetree/bindings/clock/qcom,a53pll.txt
    deleted file mode 100644
    index e3fa811..0000000
    --- a/Documentation/devicetree/bindings/clock/qcom,a53pll.txt
    +++ /dev/null
    @@ -1,22 +0,0 @@
    -Qualcomm MSM8916 A53 PLL Binding
    ---------------------------------
    -The A53 PLL on MSM8916 platforms is the main CPU PLL used used for frequencies
    -above 1GHz.
    -
    -Required properties :
    -- compatible : Shall contain only one of the following:
    -
    - "qcom,msm8916-a53pll"
    -
    -- reg : shall contain base register location and length
    -
    -- #clock-cells : must be set to <0>
    -
    -Example:
    -
    - a53pll: clock@b016000 {
    - compatible = "qcom,msm8916-a53pll";
    - reg = <0xb016000 0x40>;
    - #clock-cells = <0>;
    - };
    -
    diff --git a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
    new file mode 100644
    index 0000000..97b234e
    --- /dev/null
    +++ b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
    @@ -0,0 +1,60 @@
    +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    +%YAML 1.2
    +---
    +$id: http://devicetree.org/schemas/bindings/clock/qcom,a53pll.yaml#
    +$schema: http://devicetree.org/meta-schemas/core.yaml#
    +
    +title: Qualcomm A53 PLL Binding
    +
    +maintainers:
    + - Sivaprakash Murugesan <sivaprak@codeaurora.org>
    +
    +description:
    + The A53 PLL on few Qualcomm platforms is the main CPU PLL used used for
    + frequencies above 1GHz.
    +
    +properties:
    + compatible:
    + enum:
    + - qcom,msm8916-a53pll
    + - qcom,ipq6018-a53pll
    +
    + reg:
    + maxItems: 1
    +
    + '#clock-cells':
    + const: 0
    +
    + clocks:
    + description: clocks required for this controller.
    + maxItems: 1
    +
    + clock-names:
    + description: clock output names of required clocks.
    + maxItems: 1
    +
    +required:
    + - compatible
    + - reg
    + - '#clock-cells'
    +
    +additionalProperties: false
    +
    +examples:
    + #Example 1 - A53 PLL found on MSM8916 devices
    + - |
    + a53pll: clock@b016000 {
    + compatible = "qcom,msm8916-a53pll";
    + reg = <0xb016000 0x40>;
    + #clock-cells = <0>;
    + };
    +
    + #Example 2 - A53 PLL found on IPQ6018 devices
    + - |
    + a53pll_ipq: clock@b116000 {
    + compatible = "qcom,ipq6018-a53pll";
    + reg = <0x0b116000 0x40>;
    + #clock-cells = <0>;
    + clocks = <&xo>;
    + clock-names = "xo";
    + };
    --
    2.7.4
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