Messages in this thread | | | Date | Mon, 27 Apr 2020 10:11:26 +0530 | From | Vinod Koul <> | Subject | Re: [PATCH 1/2] clk: qcom: gcc: Add GPU and NPU clocks for SM8150 |
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On 25-04-20, 12:10, Stephen Boyd wrote: > Quoting Vinod Koul (2020-04-23 21:43:10) > > Add the GPU and NPU clocks for SM8150. They were missed in earlier > > addition of clock driver. > > > > Signed-off-by: Vinod Koul <vkoul@kernel.org> > > Fixes tag? That way backporters know they're missing this.
Yes it makes sense to add here, will add.
> > +/* external clocks so add BRANCH_HALT_SKIP */ > > +static struct clk_branch gcc_npu_gpll0_clk_src = { > > + .halt_check = BRANCH_HALT_SKIP, > > + .clkr = { > > + .enable_reg = 0x52004, > > + .enable_mask = BIT(18), > > + .hw.init = &(struct clk_init_data){ > > + .name = "gcc_npu_gpll0_clk_src", > > + .parent_hws = (const struct clk_hw *[]){ > > + &gpll0.clkr.hw }, > > + .num_parents = 1, > > + .flags = CLK_SET_RATE_PARENT, > > + .ops = &clk_branch2_ops, > > + }, > > + }, > > +}; > > + > > +/* external clocks so add BRANCH_HALT_SKIP */ > > None of these look external. The parents are all inside this driver. Why > are we skipping the halt check?
yeah not sure why this got added here, tested and these look fine. I will update these and send update.
Thanks for the review
-- ~Vinod
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