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SubjectRe: [linux-sunxi] [RFC PATCH 4/4] pwm: sun4i: Delay after writing the period
On 2020-04-22 05:43, Samuel Holland wrote:
> Hello Pascal,
>
> On 3/17/20 10:59 AM, Pascal Roeleven wrote:
>> When disabling, ensure the period write is complete before continuing.
>> This fixes an issue on some devices when the write isn't complete
>> before
>> the panel is turned off but the clock gate is still on.
>>
>> Signed-off-by: Pascal Roeleven <dev@pascalroeleven.nl>
>> ---
>> drivers/pwm/pwm-sun4i.c | 5 +++++
>> 1 file changed, 5 insertions(+)
>>
>> diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c
>> index a11d00f96..75250fd4c 100644
>> --- a/drivers/pwm/pwm-sun4i.c
>> +++ b/drivers/pwm/pwm-sun4i.c
>> @@ -299,6 +299,10 @@ static int sun4i_pwm_apply(struct pwm_chip *chip,
>> struct pwm_device *pwm,
>> sun4i_pwm_writel(sun4i_pwm, val, PWM_CH_PRD(pwm->hwpwm));
>> next_period = jiffies + usecs_to_jiffies(cstate.period / 1000 + 1);
>>
>> + /* When disabling, make sure the period register is written first */
>> + if (!state->enabled && cstate.enabled)
>> + sun4i_pwm_wait(next_period);
>> +
>
> It is not visible from the context of this patch, but this call to
> sun4i_pwm_wait() ends up calling msleep() inside a spinlock, which
> isn't
> allowed. The spinlock should probably be converted to a mutex,
> considering that
> sun4i_pwm_apply() already sleeps and takes mutexes.
>
> Regards,
> Samuel
>

Yes you're right. A different implementation of this patch series is
being worked on, in which I'll take this into account. Unfortunately I
have other things to work on at the moment, so it might take a while.

Regards,
Pascal

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