Messages in this thread | | | From | "Wu, Hao" <> | Subject | RE: [PATCH 2/2] fpga: dfl: fix bug in port reset handshake | Date | Thu, 16 Apr 2020 08:06:17 +0000 |
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> -----Original Message----- > From: linux-fpga-owner@vger.kernel.org <linux-fpga-owner@vger.kernel.org> > On Behalf Of Xu Yilun > Sent: Thursday, April 16, 2020 11:12 AM > To: mdf@kernel.org; linux-fpga@vger.kernel.org; linux- > kernel@vger.kernel.org > Cc: trix@redhat.com; bhu@redhat.com; Matthew Gerlach > <matthew.gerlach@linux.intel.com>; Xu, Yilun <yilun.xu@intel.com> > Subject: [PATCH 2/2] fpga: dfl: fix bug in port reset handshake > > From: Matthew Gerlach <matthew.gerlach@linux.intel.com> > > When putting the port in reset, driver must wait for the soft reset > acknowledgment bit instead of the soft reset bit. > > Fixes: 47c1b19c160f (fpga: dfl: afu: add port ops support) > Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> > Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Thanks for catching this.
Acked-by: Wu Hao <hao.wu@intel.com>
> --- > drivers/fpga/dfl-afu-main.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/fpga/dfl-afu-main.c b/drivers/fpga/dfl-afu-main.c > index b0c3178..3fa2c59 100644 > --- a/drivers/fpga/dfl-afu-main.c > +++ b/drivers/fpga/dfl-afu-main.c > @@ -83,7 +83,8 @@ int __afu_port_disable(struct platform_device *pdev) > * on this port and minimum soft reset pulse width has elapsed. > * Driver polls port_soft_reset_ack to determine if reset done by HW. > */ > - if (readq_poll_timeout(base + PORT_HDR_CTRL, v, v & > PORT_CTRL_SFTRST, > + if (readq_poll_timeout(base + PORT_HDR_CTRL, v, > + v & PORT_CTRL_SFTRST_ACK, > RST_POLL_INVL, RST_POLL_TIMEOUT)) { > dev_err(&pdev->dev, "timeout, fail to reset device\n"); > return -ETIMEDOUT; > -- > 2.7.4
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