Messages in this thread | | | Subject | Re: [PATCH 5/5] net: macb: Add WoL interrupt support for MACB type of Ethernet controller | From | Florian Fainelli <> | Date | Thu, 16 Apr 2020 12:26:23 -0700 |
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On 4/16/2020 10:44 AM, nicolas.ferre@microchip.com wrote: > From: Nicolas Ferre <nicolas.ferre@microchip.com> > > Handle the Wake-on-Lan interrupt for the Cadence MACB Ethernet > controller. > As we do for the GEM version, we handle of WoL interrupt in a > specialized interrupt handler for MACB version that is positionned > just between suspend() and resume() calls. > > Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> > --- > drivers/net/ethernet/cadence/macb_main.c | 38 +++++++++++++++++++++++- > 1 file changed, 37 insertions(+), 1 deletion(-) > > diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c > index 71e6afbdfb47..6d535e3e803c 100644 > --- a/drivers/net/ethernet/cadence/macb_main.c > +++ b/drivers/net/ethernet/cadence/macb_main.c > @@ -1513,6 +1513,34 @@ static void macb_tx_restart(struct macb_queue *queue) > macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(TSTART)); > } > > +static irqreturn_t macb_wol_interrupt(int irq, void *dev_id) > +{ > + struct macb_queue *queue = dev_id; > + struct macb *bp = queue->bp; > + u32 status; > + > + status = queue_readl(queue, ISR); > + > + if (unlikely(!status)) > + return IRQ_NONE; > + > + spin_lock(&bp->lock); > + > + if (status & MACB_BIT(WOL)) { > + queue_writel(queue, IDR, MACB_BIT(WOL)); > + macb_writel(bp, WOL, 0); > + netdev_vdbg(bp->dev, "MACB WoL: queue = %u, isr = 0x%08lx\n", > + (unsigned int)(queue - bp->queues), > + (unsigned long)status); > + if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) > + queue_writel(queue, ISR, MACB_BIT(WOL)); > + }
Likewise, this would need a call to pm_wakeup_event() to record the wake-up event associated with this device. -- Florian
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