Messages in this thread | | | Subject | Re: [PATCH 2/8] arm64: cpufeature: Spell out register fields for ID_ISAR4 and ID_PFR1 | From | Suzuki K Poulose <> | Date | Wed, 15 Apr 2020 11:09:12 +0100 |
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On 04/14/2020 10:31 PM, Will Deacon wrote: > In preparation for runtime updates to the strictness of some AArch32 > features, spell out the register fields for ID_ISAR4 and ID_PFR1 to make > things clearer to read. Note that this isn't functionally necessary, as > the feature arrays themselves are not modified dynamically and remain > 'const'. > > Signed-off-by: Will Deacon <will@kernel.org> > --- > arch/arm64/include/asm/sysreg.h | 17 +++++++++++++++++ > arch/arm64/kernel/cpufeature.c | 28 ++++++++++++++++++++++++++-- > 2 files changed, 43 insertions(+), 2 deletions(-)
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
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