Messages in this thread | | | From | Jerome Brunet <> | Subject | Re: [RFC v1 0/5] GPU DVFS for Meson GXBB/GXL/GXM/G12A/G12B/SM1 | Date | Tue, 14 Apr 2020 15:05:22 +0200 |
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On Tue 31 Mar 2020 at 00:10, Martin Blumenstingl <martin.blumenstingl@googlemail.com> wrote:
> > [0] https://cgit.freedesktop.org/drm-misc/commit/?id=1996970773a323533e1cc1b6b97f00a95d675f32 > > > Martin Blumenstingl (5): > clk: meson: gxbb: Prepare the GPU clock tree to change at runtime > clk: meson: g12a: Prepare the GPU clock tree to change at runtime > arm64: dts: amlogic: meson-gx: add the Mali-450 OPP table and use DVFS > arm64: dts: amlogic: meson-gxm: add the Mali OPP table and use DVFS > arm64: dts: amlogic: meson-g12: add the Mali OPP table and use DVFS > > .../boot/dts/amlogic/meson-g12-common.dtsi | 49 ++++++++++----- > .../boot/dts/amlogic/meson-gx-mali450.dtsi | 61 +++++++++++++++++++ > arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 51 ++++------------ > .../boot/dts/amlogic/meson-gxl-mali.dtsi | 46 +++----------- > arch/arm64/boot/dts/amlogic/meson-gxm.dtsi | 45 +++++++++----- > drivers/clk/meson/g12a.c | 30 ++++++--- > drivers/clk/meson/gxbb.c | 40 ++++++------ > 7 files changed, 189 insertions(+), 133 deletions(-) > create mode 100644 arch/arm64/boot/dts/amlogic/meson-gx-mali450.dtsi
Clock part looks good to me and aligns with meson8. Please resend the clock part without the RFC tag
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