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    Subject[PATCH v2 06/11] MIPS: Kernel: Switch to new topology interface
    Date
    Adapt topology functions to new interface in various of kernel
    parts like perf, proc.

    Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
    ---
    arch/mips/kernel/cacheinfo.c | 19 ++++++-------------
    arch/mips/kernel/perf_event_mipsxx.c | 4 ++--
    arch/mips/kernel/proc.c | 8 ++++----
    arch/mips/mm/c-r4k.c | 4 ++--
    arch/mips/mm/context.c | 4 ++--
    arch/mips/oprofile/op_model_mipsxx.c | 4 ++--
    6 files changed, 18 insertions(+), 25 deletions(-)

    diff --git a/arch/mips/kernel/cacheinfo.c b/arch/mips/kernel/cacheinfo.c
    index 47312c529410..9a5f12830440 100644
    --- a/arch/mips/kernel/cacheinfo.c
    +++ b/arch/mips/kernel/cacheinfo.c
    @@ -3,6 +3,7 @@
    * MIPS cacheinfo support
    */
    #include <linux/cacheinfo.h>
    +#include <linux/topology.h>

    /* Populates leaf and increments to next leaf */
    #define populate_cache(cache, leaf, c_level, c_type) \
    @@ -50,22 +51,12 @@ static int __init_cache_level(unsigned int cpu)
    return 0;
    }

    -static void fill_cpumask_siblings(int cpu, cpumask_t *cpu_map)
    -{
    - int cpu1;
    -
    - for_each_possible_cpu(cpu1)
    - if (cpus_are_siblings(cpu, cpu1))
    - cpumask_set_cpu(cpu1, cpu_map);
    -}
    -
    static void fill_cpumask_cluster(int cpu, cpumask_t *cpu_map)
    {
    int cpu1;
    - int cluster = cpu_cluster(&cpu_data[cpu]);

    for_each_possible_cpu(cpu1)
    - if (cpu_cluster(&cpu_data[cpu1]) == cluster)
    + if (cpu_cluster(cpu1) == cpu_cluster(cpu))
    cpumask_set_cpu(cpu1, cpu_map);
    }

    @@ -77,9 +68,11 @@ static int __populate_cache_leaves(unsigned int cpu)

    if (c->icache.waysize) {
    /* L1 caches are per core */
    - fill_cpumask_siblings(cpu, &this_leaf->shared_cpu_map);
    + cpumask_copy(&this_leaf->shared_cpu_map,
    + topology_sibling_cpumask(cpu));
    populate_cache(dcache, this_leaf, 1, CACHE_TYPE_DATA);
    - fill_cpumask_siblings(cpu, &this_leaf->shared_cpu_map);
    + cpumask_copy(&this_leaf->shared_cpu_map,
    + topology_sibling_cpumask(cpu));
    populate_cache(icache, this_leaf, 1, CACHE_TYPE_INST);
    } else {
    populate_cache(dcache, this_leaf, 1, CACHE_TYPE_UNIFIED);
    diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c
    index 128fc9999c56..e9ed3526bad0 100644
    --- a/arch/mips/kernel/perf_event_mipsxx.c
    +++ b/arch/mips/kernel/perf_event_mipsxx.c
    @@ -127,7 +127,7 @@ static DEFINE_RWLOCK(pmuint_rwlock);
    0 : (smp_processor_id() & MIPS_CPUID_TO_COUNTER_MASK))
    #else
    #define vpe_id() (cpu_has_mipsmt_pertccounters ? \
    - 0 : cpu_vpe_id(&current_cpu_data))
    + 0 : cpu_vpe_id(smp_processor_id()))
    #endif

    /* Copied from op_model_mipsxx.c */
    @@ -343,7 +343,7 @@ static void mipsxx_pmu_enable_event(struct hw_perf_event *evt, int idx)
    */
    cpu = (event->cpu >= 0) ? event->cpu : smp_processor_id();

    - ctrl = M_PERFCTL_VPEID(cpu_vpe_id(&cpu_data[cpu]));
    + ctrl = M_PERFCTL_VPEID(cpu_vpe_id(smp_processor_id()));
    ctrl |= M_TC_EN_VPE;
    cpuc->saved_ctrl[idx] |= ctrl;
    pr_debug("Enabling perf counter for CPU%d\n", cpu);
    diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
    index f8d36710cd58..e8795b262ca2 100644
    --- a/arch/mips/kernel/proc.c
    +++ b/arch/mips/kernel/proc.c
    @@ -138,14 +138,14 @@ static int show_cpuinfo(struct seq_file *m, void *v)
    cpu_data[n].srsets);
    seq_printf(m, "kscratch registers\t: %d\n",
    hweight8(cpu_data[n].kscratch_mask));
    - seq_printf(m, "package\t\t\t: %d\n", cpu_data[n].package);
    - seq_printf(m, "core\t\t\t: %d\n", cpu_core(&cpu_data[n]));
    + seq_printf(m, "package\t\t\t: %d\n", cpu_cluster(n));
    + seq_printf(m, "core\t\t\t: %d\n", cpu_core(n));

    #if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_CPU_MIPSR6)
    if (cpu_has_mipsmt)
    - seq_printf(m, "VPE\t\t\t: %d\n", cpu_vpe_id(&cpu_data[n]));
    + seq_printf(m, "VPE\t\t\t: %d\n", cpu_vpe_id(n));
    else if (cpu_has_vp)
    - seq_printf(m, "VP\t\t\t: %d\n", cpu_vpe_id(&cpu_data[n]));
    + seq_printf(m, "VP\t\t\t: %d\n", cpu_vpe_id(n));
    #endif

    sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
    diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
    index 36a311348739..851559ef0bc3 100644
    --- a/arch/mips/mm/c-r4k.c
    +++ b/arch/mips/mm/c-r4k.c
    @@ -547,7 +547,7 @@ static inline int has_valid_asid(const struct mm_struct *mm, unsigned int type)
    if (cpu_has_mmid)
    return cpu_context(0, mm) != 0;

    - /* cpu_sibling_map[] undeclared when !CONFIG_SMP */
    + /* topology_sibling_cpumask undeclared when !CONFIG_SMP */
    #ifdef CONFIG_SMP
    /*
    * If r4k_on_each_cpu does SMP calls, it does them to a single VPE in
    @@ -555,7 +555,7 @@ static inline int has_valid_asid(const struct mm_struct *mm, unsigned int type)
    * Otherwise we need to worry about all present CPUs.
    */
    if (r4k_op_needs_ipi(type))
    - mask = &cpu_sibling_map[smp_processor_id()];
    + mask = topology_sibling_cpumask(smp_processor_id());
    #endif
    for_each_cpu(i, mask)
    if (cpu_context(i, mm))
    diff --git a/arch/mips/mm/context.c b/arch/mips/mm/context.c
    index b25564090939..ad2d8b7f464b 100644
    --- a/arch/mips/mm/context.c
    +++ b/arch/mips/mm/context.c
    @@ -241,12 +241,12 @@ void check_switch_mmu_context(struct mm_struct *mm)
    * increase then we need to invalidate any TLB entries for our MMID
    * that we might otherwise pick up from a sibling.
    *
    - * We ifdef on CONFIG_SMP because cpu_sibling_map isn't defined in
    + * We ifdef on CONFIG_SMP because topology_sibling_cpumask isn't defined in
    * CONFIG_SMP=n kernels.
    */
    #ifdef CONFIG_SMP
    if (cpu_has_shared_ftlb_entries &&
    - cpumask_intersects(&tlb_flush_pending, &cpu_sibling_map[cpu])) {
    + cpumask_intersects(&tlb_flush_pending, topology_sibling_cpumask(cpu))) {
    /* Ensure we operate on the new MMID */
    mtc0_tlbw_hazard();

    diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
    index a537bf98912c..0129dfcf5d55 100644
    --- a/arch/mips/oprofile/op_model_mipsxx.c
    +++ b/arch/mips/oprofile/op_model_mipsxx.c
    @@ -37,9 +37,9 @@ static int perfcount_irq;

    #ifdef CONFIG_MIPS_MT_SMP
    #define WHAT (MIPS_PERFCTRL_MT_EN_VPE | \
    - M_PERFCTL_VPEID(cpu_vpe_id(&current_cpu_data)))
    + M_PERFCTL_VPEID(cpu_vpe_id(smp_processor_id())))
    #define vpe_id() (cpu_has_mipsmt_pertccounters ? \
    - 0 : cpu_vpe_id(&current_cpu_data))
    + 0 : cpu_vpe_id(smp_processor_id()))

    /*
    * The number of bits to shift to convert between counters per core and
    --
    2.26.0.rc2
    \
     
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