Messages in this thread | | | From | "Liu, Yi L" <> | Subject | RE: [PATCH v1 1/2] vfio/pci: Expose PCIe PASID capability to guest | Date | Tue, 31 Mar 2020 06:42:18 +0000 |
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> From: Tian, Kevin <kevin.tian@intel.com> > Sent: Tuesday, March 31, 2020 2:39 PM > To: Liu, Yi L <yi.l.liu@intel.com>; alex.williamson@redhat.com; > Subject: RE: [PATCH v1 1/2] vfio/pci: Expose PCIe PASID capability to guest > > > From: Liu, Yi L <yi.l.liu@intel.com> > > Sent: Sunday, March 22, 2020 8:33 PM > > > > From: Liu Yi L <yi.l.liu@intel.com> > > > > This patch exposes PCIe PASID capability to guest. Existing vfio_pci > > driver hides it from guest by setting the capability length as 0 in > > pci_ext_cap_length[]. > > > > This capability is required for vSVA enabling on pass-through PCIe > > devices. > > should this be [PATCH 2/2], after you have the emulation in place?
oh, yes, I can re-sequence it.
> and it might be worthy of noting that PRI is already exposed, to > avoid confusion from one like me that why two capabilities are > emulated in this series while only one is being exposed. 😊
got it. it would be helpful. thanks.
Regards, Yi Liu
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